nrf9160_peripherals.h 5.6 KB

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  1. /*
  2. Copyright (c) 2010 - 2020, Nordic Semiconductor ASA
  3. All rights reserved.
  4. Redistribution and use in source and binary forms, with or without modification,
  5. are permitted provided that the following conditions are met:
  6. 1. Redistributions of source code must retain the above copyright notice, this
  7. list of conditions and the following disclaimer.
  8. 2. Redistributions in binary form, except as embedded into a Nordic
  9. Semiconductor ASA integrated circuit in a product or a software update for
  10. such product, must reproduce the above copyright notice, this list of
  11. conditions and the following disclaimer in the documentation and/or other
  12. materials provided with the distribution.
  13. 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  14. contributors may be used to endorse or promote products derived from this
  15. software without specific prior written permission.
  16. 4. This software, with or without modification, must only be used with a
  17. Nordic Semiconductor ASA integrated circuit.
  18. 5. Any software provided in binary form under this license must not be reverse
  19. engineered, decompiled, modified and/or disassembled.
  20. THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  21. OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22. OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  23. DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  24. LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25. CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  26. GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  27. HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  28. LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  29. OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30. */
  31. #ifndef _NRF9160_PERIPHERALS_H
  32. #define _NRF9160_PERIPHERALS_H
  33. /* UICR */
  34. #define UICR_KEYSLOT_COUNT 128
  35. /* Clock Peripheral */
  36. #define CLOCK_PRESENT
  37. #define CLOCK_COUNT 1
  38. /* Power Peripheral */
  39. #define POWER_PRESENT
  40. #define POWER_COUNT 1
  41. /* Non-Volatile Memory Controller */
  42. #define NVMC_PRESENT
  43. #define NVMC_COUNT 1
  44. #define NVMC_FEATURE_CACHE_PRESENT
  45. /* GPIO */
  46. #define GPIO_PRESENT
  47. #define GPIO_COUNT 1
  48. #define P0_PIN_NUM 32
  49. #define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
  50. /* Distributed Peripheral to Peripheral Interconnect */
  51. #define DPPI_PRESENT
  52. #define DPPI_COUNT 1
  53. #define DPPI_CH_NUM 16
  54. #define DPPI_GROUP_NUM 6
  55. /* Event Generator Unit */
  56. #define EGU_PRESENT
  57. #define EGU_COUNT 6
  58. #define EGU0_CH_NUM 16
  59. #define EGU1_CH_NUM 16
  60. #define EGU2_CH_NUM 16
  61. #define EGU3_CH_NUM 16
  62. #define EGU4_CH_NUM 16
  63. #define EGU5_CH_NUM 16
  64. /* Timer/Counter */
  65. #define TIMER_PRESENT
  66. #define TIMER_COUNT 3
  67. #define TIMER0_MAX_SIZE 32
  68. #define TIMER1_MAX_SIZE 32
  69. #define TIMER2_MAX_SIZE 32
  70. #define TIMER0_CC_NUM 6
  71. #define TIMER1_CC_NUM 6
  72. #define TIMER2_CC_NUM 6
  73. /* Real Time Counter */
  74. #define RTC_PRESENT
  75. #define RTC_COUNT 2
  76. #define RTC0_CC_NUM 4
  77. #define RTC1_CC_NUM 4
  78. /* Watchdog Timer */
  79. #define WDT_PRESENT
  80. #define WDT_COUNT 1
  81. /* Serial Peripheral Interface Master with DMA */
  82. #define SPIM_PRESENT
  83. #define SPIM_COUNT 4
  84. #define SPIM0_MAX_DATARATE 8
  85. #define SPIM1_MAX_DATARATE 8
  86. #define SPIM2_MAX_DATARATE 8
  87. #define SPIM3_MAX_DATARATE 8
  88. #define SPIM0_EASYDMA_MAXCNT_SIZE 12
  89. #define SPIM1_EASYDMA_MAXCNT_SIZE 12
  90. #define SPIM2_EASYDMA_MAXCNT_SIZE 12
  91. #define SPIM3_EASYDMA_MAXCNT_SIZE 12
  92. /* Serial Peripheral Interface Slave with DMA*/
  93. #define SPIS_PRESENT
  94. #define SPIS_COUNT 4
  95. #define SPIS0_EASYDMA_MAXCNT_SIZE 12
  96. #define SPIS1_EASYDMA_MAXCNT_SIZE 12
  97. #define SPIS2_EASYDMA_MAXCNT_SIZE 12
  98. #define SPIS3_EASYDMA_MAXCNT_SIZE 12
  99. /* Two Wire Interface Master with DMA */
  100. #define TWIM_PRESENT
  101. #define TWIM_COUNT 4
  102. #define TWIM0_EASYDMA_MAXCNT_SIZE 12
  103. #define TWIM1_EASYDMA_MAXCNT_SIZE 12
  104. #define TWIM2_EASYDMA_MAXCNT_SIZE 12
  105. #define TWIM3_EASYDMA_MAXCNT_SIZE 12
  106. /* Two Wire Interface Slave with DMA */
  107. #define TWIS_PRESENT
  108. #define TWIS_COUNT 4
  109. #define TWIS0_EASYDMA_MAXCNT_SIZE 12
  110. #define TWIS1_EASYDMA_MAXCNT_SIZE 12
  111. #define TWIS2_EASYDMA_MAXCNT_SIZE 12
  112. #define TWIS3_EASYDMA_MAXCNT_SIZE 12
  113. /* Universal Asynchronous Receiver-Transmitter with DMA */
  114. #define UARTE_PRESENT
  115. #define UARTE_COUNT 4
  116. #define UARTE0_EASYDMA_MAXCNT_SIZE 12
  117. #define UARTE1_EASYDMA_MAXCNT_SIZE 12
  118. #define UARTE2_EASYDMA_MAXCNT_SIZE 12
  119. #define UARTE3_EASYDMA_MAXCNT_SIZE 12
  120. /* Successive Approximation Analog to Digital Converter */
  121. #define SAADC_PRESENT
  122. #define SAADC_COUNT 1
  123. #define SAADC_CH_NUM 8
  124. #define SAADC_EASYDMA_MAXCNT_SIZE 15
  125. /* GPIO Tasks and Events */
  126. #define GPIOTE_PRESENT
  127. #define GPIOTE_COUNT 2
  128. #define GPIOTE_CH_NUM 8
  129. #define GPIOTE_FEATURE_SET_PRESENT
  130. #define GPIOTE_FEATURE_CLR_PRESENT
  131. /* Pulse Width Modulator */
  132. #define PWM_PRESENT
  133. #define PWM_COUNT 4
  134. #define PWM_CH_NUM 4
  135. #define PWM_EASYDMA_MAXCNT_SIZE 15
  136. /* Pulse Density Modulator */
  137. #define PDM_PRESENT
  138. #define PDM_COUNT 1
  139. #define PDM_EASYDMA_MAXCNT_SIZE 15
  140. /* Inter-IC Sound Interface */
  141. #define I2S_PRESENT
  142. #define I2S_COUNT 1
  143. #define I2S_EASYDMA_MAXCNT_SIZE 14
  144. /* Inter Processor Communication */
  145. #define IPC_PRESENT
  146. #define IPC_COUNT 1
  147. #define IPC_CH_NUM 8
  148. #define IPC_CONF_NUM 8
  149. #define IPC_GPMEM_NUM 4
  150. /* FPU */
  151. #define FPU_PRESENT
  152. #define FPU_COUNT 1
  153. /* SPU */
  154. #define SPU_PRESENT
  155. #define SPU_COUNT 1
  156. /* CRYPTOCELL */
  157. #define CRYPTOCELL_PRESENT
  158. #define CRYPTOCELL_COUNT 1
  159. /* KMU */
  160. #define KMU_PRESENT
  161. #define KMU_COUNT 1
  162. #define KMU_KEYSLOT_PRESENT
  163. /* MAGPIO */
  164. #define MAGPIO_PRESENT
  165. #define MAGPIO_COUNT 1
  166. #define MAGPIO_PIN_NUM 3
  167. /* REGULATORS */
  168. #define REGULATORS_PRESENT
  169. #define REGULATORS_COUNT 1
  170. #endif // _NRF9160_PERIPHERALS_H