nrfx_spis.h 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256
  1. /**
  2. * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef NRFX_SPIS_H__
  41. #define NRFX_SPIS_H__
  42. #include <nrfx.h>
  43. #include <hal/nrf_spis.h>
  44. #include <hal/nrf_gpio.h>
  45. #ifdef __cplusplus
  46. extern "C" {
  47. #endif
  48. /**
  49. * @defgroup nrfx_spis SPIS driver
  50. * @{
  51. * @ingroup nrf_spis
  52. * @brief Serial Peripheral Interface Slave with EasyDMA (SPIS) driver.
  53. */
  54. /** @brief Data structure for the Serial Peripheral Interface Slave with EasyDMA (SPIS) driver instance. */
  55. typedef struct
  56. {
  57. NRF_SPIS_Type * p_reg; //!< Pointer to a structure with SPIS registers.
  58. uint8_t drv_inst_idx; //!< Index of the driver instance. For internal use only.
  59. } nrfx_spis_t;
  60. #ifndef __NRFX_DOXYGEN__
  61. enum {
  62. #if NRFX_CHECK(NRFX_SPIS0_ENABLED)
  63. NRFX_SPIS0_INST_IDX,
  64. #endif
  65. #if NRFX_CHECK(NRFX_SPIS1_ENABLED)
  66. NRFX_SPIS1_INST_IDX,
  67. #endif
  68. #if NRFX_CHECK(NRFX_SPIS2_ENABLED)
  69. NRFX_SPIS2_INST_IDX,
  70. #endif
  71. #if NRFX_CHECK(NRFX_SPIS3_ENABLED)
  72. NRFX_SPIS3_INST_IDX,
  73. #endif
  74. NRFX_SPIS_ENABLED_COUNT
  75. };
  76. #endif
  77. /** @brief Macro for creating an instance of the SPI slave driver. */
  78. #define NRFX_SPIS_INSTANCE(id) \
  79. { \
  80. .p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \
  81. .drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIS, id, _INST_IDX), \
  82. }
  83. /**
  84. * @brief This value can be provided instead of a pin number for the signals MOSI
  85. * and MISO to specify that the given signal is not used and therefore
  86. * does not need to be connected to a pin.
  87. */
  88. #define NRFX_SPIS_PIN_NOT_USED 0xFF
  89. /** @brief Default pull-up configuration of the SPI CS. */
  90. #define NRFX_SPIS_DEFAULT_CSN_PULLUP NRF_GPIO_PIN_NOPULL
  91. /** @brief Default drive configuration of the SPI MISO. */
  92. #define NRFX_SPIS_DEFAULT_MISO_DRIVE NRF_GPIO_PIN_S0S1
  93. /** @brief SPI slave driver event types. */
  94. typedef enum
  95. {
  96. NRFX_SPIS_BUFFERS_SET_DONE, //!< Memory buffer set event. Memory buffers have been set successfully to the SPI slave device, and SPI transaction can be done.
  97. NRFX_SPIS_XFER_DONE, //!< SPI transaction event. SPI transaction has been completed.
  98. NRFX_SPIS_EVT_TYPE_MAX //!< Enumeration upper bound.
  99. } nrfx_spis_evt_type_t;
  100. /** @brief SPI slave driver event structure. */
  101. typedef struct
  102. {
  103. nrfx_spis_evt_type_t evt_type; //!< Type of the event.
  104. size_t rx_amount; //!< Number of bytes received in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
  105. size_t tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
  106. } nrfx_spis_evt_t;
  107. /** @brief The default configuration of the SPI slave instance. */
  108. #define NRFX_SPIS_DEFAULT_CONFIG \
  109. { \
  110. .miso_pin = NRFX_SPIS_PIN_NOT_USED, \
  111. .mosi_pin = NRFX_SPIS_PIN_NOT_USED, \
  112. .sck_pin = NRFX_SPIS_PIN_NOT_USED, \
  113. .csn_pin = NRFX_SPIS_PIN_NOT_USED, \
  114. .mode = NRF_SPIS_MODE_0, \
  115. .bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
  116. .csn_pullup = NRFX_SPIS_DEFAULT_CSN_PULLUP, \
  117. .miso_drive = NRFX_SPIS_DEFAULT_MISO_DRIVE, \
  118. .def = NRFX_SPIS_DEFAULT_DEF, \
  119. .orc = NRFX_SPIS_DEFAULT_ORC, \
  120. .irq_priority = NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY, \
  121. }
  122. /** @brief SPI peripheral device configuration data. */
  123. typedef struct
  124. {
  125. uint32_t miso_pin; //!< SPI MISO pin (optional).
  126. /**< Set @ref NRFX_SPIS_PIN_NOT_USED
  127. * if this signal is not needed. */
  128. uint32_t mosi_pin; //!< SPI MOSI pin (optional).
  129. /**< Set @ref NRFX_SPIS_PIN_NOT_USED
  130. * if this signal is not needed. */
  131. uint32_t sck_pin; //!< SPI SCK pin.
  132. uint32_t csn_pin; //!< SPI CSN pin.
  133. nrf_spis_mode_t mode; //!< SPI mode.
  134. nrf_spis_bit_order_t bit_order; //!< SPI transaction bit order.
  135. nrf_gpio_pin_pull_t csn_pullup; //!< CSN pin pull-up configuration.
  136. nrf_gpio_pin_drive_t miso_drive; //!< MISO pin drive configuration.
  137. uint8_t def; //!< Character clocked out in case of an ignored transaction.
  138. uint8_t orc; //!< Character clocked out after an over-read of the transmit buffer.
  139. uint8_t irq_priority; //!< Interrupt priority.
  140. } nrfx_spis_config_t;
  141. /**
  142. * @brief SPI slave driver event handler type.
  143. *
  144. * @param[in] p_event Pointer to the event structure. The structure is
  145. * allocated on the stack so it is valid only until
  146. * the event handler returns.
  147. * @param[in] p_context Context set on initialization.
  148. */
  149. typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_evt_t const * p_event,
  150. void * p_context);
  151. /**
  152. * @brief Function for initializing the SPI slave driver instance.
  153. *
  154. * @note When the nRF52 Anomaly 109 workaround for SPIS is enabled, this function
  155. * initializes the GPIOTE driver as well, and uses one of GPIOTE channels
  156. * to detect falling edges on CSN pin.
  157. *
  158. * @param[in] p_instance Pointer to the driver instance structure.
  159. * @param[in] p_config Pointer to the structure with the initial configuration.
  160. * @param[in] event_handler Function to be called by the SPI slave driver upon event.
  161. * Must not be NULL.
  162. * @param[in] p_context Context passed to the event handler.
  163. *
  164. * @retval NRFX_SUCCESS The initialization was successful.
  165. * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
  166. * @retval NRFX_ERROR_INVALID_PARAM Invalid parameter is supplied.
  167. * @retval NRFX_ERROR_BUSY Some other peripheral with the same
  168. * instance ID is already in use. This is
  169. * possible only if @ref nrfx_prs module
  170. * is enabled.
  171. * @retval NRFX_ERROR_INTERNAL GPIOTE channel for detecting falling edges
  172. * on CSN pin cannot be initialized. Possible
  173. * only when using nRF52 Anomaly 109 workaround.
  174. */
  175. nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
  176. nrfx_spis_config_t const * p_config,
  177. nrfx_spis_event_handler_t event_handler,
  178. void * p_context);
  179. /**
  180. * @brief Function for uninitializing the SPI slave driver instance.
  181. *
  182. * @param[in] p_instance Pointer to the driver instance structure.
  183. */
  184. void nrfx_spis_uninit(nrfx_spis_t const * const p_instance);
  185. /**
  186. * @brief Function for preparing the SPI slave instance for a single SPI transaction.
  187. *
  188. * This function prepares the SPI slave device to be ready for a single SPI transaction. It configures
  189. * the SPI slave device to use the memory supplied with the function call in SPI transactions.
  190. *
  191. * When either the memory buffer configuration or the SPI transaction has been
  192. * completed, the event callback function will be called with the appropriate event
  193. * @ref nrfx_spis_evt_type_t. The callback function can be called before returning from
  194. * this function, because it is called from the SPI slave interrupt context.
  195. *
  196. * @note This function can be called from the callback function context.
  197. *
  198. * @note Client applications must call this function after every @ref NRFX_SPIS_XFER_DONE event if
  199. * the SPI slave driver must be prepared for a possible new SPI transaction.
  200. *
  201. * @note Peripherals using EasyDMA (including SPIS) require the transfer buffers
  202. * to be placed in the Data RAM region. If this condition is not met,
  203. * this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
  204. *
  205. * @param[in] p_instance Pointer to the driver instance structure.
  206. * @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero.
  207. * @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero.
  208. * @param[in] tx_buffer_length Length of the TX buffer in bytes.
  209. * @param[in] rx_buffer_length Length of the RX buffer in bytes.
  210. *
  211. * @retval NRFX_SUCCESS The operation was successful.
  212. * @retval NRFX_ERROR_INVALID_STATE The operation failed because the SPI slave device is in an incorrect state.
  213. * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
  214. * RAM region.
  215. * @retval NRFX_ERROR_INVALID_LENGTH Provided lengths exceed the EasyDMA limits for the peripheral.
  216. * @retval NRFX_ERROR_INTERNAL The operation failed because of an internal error.
  217. */
  218. nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
  219. uint8_t const * p_tx_buffer,
  220. size_t tx_buffer_length,
  221. uint8_t * p_rx_buffer,
  222. size_t rx_buffer_length);
  223. /** @} */
  224. void nrfx_spis_0_irq_handler(void);
  225. void nrfx_spis_1_irq_handler(void);
  226. void nrfx_spis_2_irq_handler(void);
  227. void nrfx_spis_3_irq_handler(void);
  228. #ifdef __cplusplus
  229. }
  230. #endif
  231. #endif // NRFX_SPIS_H__