ses_startup_nrf_common.s 8.3 KB

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  1. /***********************************************************************************
  2. * SEGGER Microcontroller GmbH *
  3. * The Embedded Experts *
  4. ***********************************************************************************
  5. * *
  6. * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
  7. * *
  8. * www.segger.com Support: support@segger.com *
  9. * *
  10. ***********************************************************************************
  11. * *
  12. * All rights reserved. *
  13. * *
  14. * Redistribution and use in source and binary forms, with or *
  15. * without modification, are permitted provided that the following *
  16. * conditions are met: *
  17. * *
  18. * - Redistributions of source code must retain the above copyright *
  19. * notice, this list of conditions and the following disclaimer. *
  20. * *
  21. * - Neither the name of SEGGER Microcontroller GmbH *
  22. * nor the names of its contributors may be used to endorse or *
  23. * promote products derived from this software without specific *
  24. * prior written permission. *
  25. * *
  26. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
  27. * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
  28. * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
  29. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
  30. * DISCLAIMED. *
  31. * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
  32. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
  34. * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
  35. * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
  36. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
  37. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
  38. * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
  39. * DAMAGE. *
  40. * *
  41. ***********************************************************************************/
  42. /************************************************************************************
  43. * Preprocessor Definitions *
  44. * ------------------------ *
  45. * NO_FPU_ENABLE *
  46. * *
  47. * If defined, FPU will not be enabled. *
  48. * *
  49. * NO_STACK_INIT *
  50. * *
  51. * If defined, the stack pointer will not be initialised. *
  52. * *
  53. * NO_SYSTEM_INIT *
  54. * *
  55. * If defined, the SystemInit() function will not be called. By default *
  56. * SystemInit() is called after reset to enable the clocks and memories to *
  57. * be initialised prior to any C startup initialisation. *
  58. * *
  59. * NO_VTOR_CONFIG *
  60. * *
  61. * If defined, the vector table offset register will not be configured. *
  62. * *
  63. * MEMORY_INIT *
  64. * *
  65. * If defined, the MemoryInit() function will be called. By default *
  66. * MemoryInit() is called after SystemInit() to enable an external memory *
  67. * controller. *
  68. * *
  69. * STACK_INIT_VAL *
  70. * *
  71. * If defined, specifies the initial stack pointer value. If undefined, *
  72. * the stack pointer will be initialised to point to the end of the *
  73. * RAM segment. *
  74. * *
  75. * VECTORS_IN_RAM *
  76. * *
  77. * If defined, the exception vectors will be copied from Flash to RAM. *
  78. * *
  79. ************************************************************************************/
  80. .syntax unified
  81. .global Reset_Handler
  82. #ifdef INITIALIZE_USER_SECTIONS
  83. .global InitializeUserMemorySections
  84. #endif
  85. .extern _vectors
  86. .extern nRFInitialize
  87. .section .init, "ax"
  88. .thumb_func
  89. .equ VTOR_REG, 0xE000ED08
  90. .equ FPU_CPACR_REG, 0xE000ED88
  91. #ifndef STACK_INIT_VAL
  92. #define STACK_INIT_VAL __RAM_segment_end__
  93. #endif
  94. Reset_Handler:
  95. /* Perform prestart tasks. */
  96. ldr r0, =nRFInitialize
  97. blx r0
  98. #ifndef NO_STACK_INIT
  99. /* Initialise main stack */
  100. ldr r0, =STACK_INIT_VAL
  101. ldr r1, =0x7
  102. bics r0, r1
  103. mov sp, r0
  104. #endif
  105. #ifndef NO_SYSTEM_INIT
  106. /* Initialise system */
  107. ldr r0, =SystemInit
  108. blx r0
  109. #endif
  110. #ifdef MEMORY_INIT
  111. ldr r0, =MemoryInit
  112. blx r0
  113. #endif
  114. #ifdef VECTORS_IN_RAM
  115. /* Copy exception vectors into RAM */
  116. ldr r0, =__vectors_start__
  117. ldr r1, =__vectors_end__
  118. ldr r2, =__vectors_ram_start__
  119. 1:
  120. cmp r0, r1
  121. beq 2f
  122. ldr r3, [r0]
  123. str r3, [r2]
  124. adds r0, r0, #4
  125. adds r2, r2, #4
  126. b 1b
  127. 2:
  128. #endif
  129. #ifndef NO_VTOR_CONFIG
  130. /* Configure vector table offset register */
  131. ldr r0, =VTOR_REG
  132. #ifdef VECTORS_IN_RAM
  133. ldr r1, =_vectors_ram
  134. #else
  135. ldr r1, =_vectors
  136. #endif
  137. str r1, [r0]
  138. #endif
  139. #if (defined(__ARM_ARCH_FPV4_SP_D16__) || defined(__ARM_ARCH_FPV5_D16__)) && !defined(NO_FPU_ENABLE)
  140. /* Enable FPU */
  141. ldr r0, =FPU_CPACR_REG
  142. ldr r1, [r0]
  143. orr r1, r1, #(0xF << 20)
  144. str r1, [r0]
  145. dsb
  146. isb
  147. #endif
  148. /* Jump to program start */
  149. b _start
  150. #ifdef INITIALIZE_USER_SECTIONS
  151. .thumb_func
  152. InitializeUserMemorySections:
  153. ldr r0, =__start_nrf_sections
  154. ldr r1, =__start_nrf_sections_run
  155. ldr r2, =__end_nrf_sections_run
  156. cmp r0, r1
  157. beq 2f
  158. subs r2, r2, r1
  159. beq 2f
  160. 1:
  161. ldrb r3, [r0]
  162. adds r0, r0, #1
  163. strb r3, [r1]
  164. adds r1, r1, #1
  165. subs r2, r2, #1
  166. bne 1b
  167. 2:
  168. bx lr
  169. #endif