nrf_drv_clock.c 17 KB

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  1. /**
  2. * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #include <nordic_common.h>
  41. #include "nrf_drv_clock.h"
  42. #if NRF_MODULE_ENABLED(NRF_CLOCK)
  43. #ifdef SOFTDEVICE_PRESENT
  44. #include "nrf_sdh.h"
  45. #include "nrf_sdh_soc.h"
  46. #endif
  47. #define NRF_LOG_MODULE_NAME clock
  48. #if CLOCK_CONFIG_LOG_ENABLED
  49. #define NRF_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL
  50. #define NRF_LOG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR
  51. #define NRF_LOG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR
  52. #else //CLOCK_CONFIG_LOG_ENABLED
  53. #define NRF_LOG_LEVEL 0
  54. #endif //CLOCK_CONFIG_LOG_ENABLED
  55. #include "nrf_log.h"
  56. NRF_LOG_MODULE_REGISTER();
  57. #define EVT_TO_STR(event) \
  58. (event == NRF_CLOCK_EVENT_HFCLKSTARTED ? "NRF_CLOCK_EVENT_HFCLKSTARTED" : \
  59. (event == NRF_CLOCK_EVENT_LFCLKSTARTED ? "NRF_CLOCK_EVENT_LFCLKSTARTED" : \
  60. (event == NRF_CLOCK_EVENT_DONE ? "NRF_CLOCK_EVENT_DONE" : \
  61. (event == NRF_CLOCK_EVENT_CTTO ? "NRF_CLOCK_EVENT_CTTO" : \
  62. "UNKNOWN EVENT"))))
  63. /*lint -save -e652 */
  64. #define NRF_CLOCK_LFCLK_RC CLOCK_LFCLKSRC_SRC_RC
  65. #define NRF_CLOCK_LFCLK_Xtal CLOCK_LFCLKSRC_SRC_Xtal
  66. #define NRF_CLOCK_LFCLK_Synth CLOCK_LFCLKSRC_SRC_Synth
  67. /*lint -restore */
  68. #if (CLOCK_CONFIG_LF_SRC == NRF_CLOCK_LFCLK_RC) && !defined(SOFTDEVICE_PRESENT)
  69. #define CALIBRATION_SUPPORT 1
  70. #else
  71. #define CALIBRATION_SUPPORT 0
  72. #endif
  73. typedef enum
  74. {
  75. CAL_STATE_IDLE,
  76. CAL_STATE_CT,
  77. CAL_STATE_HFCLK_REQ,
  78. CAL_STATE_CAL,
  79. CAL_STATE_ABORT,
  80. } nrf_drv_clock_cal_state_t;
  81. /**@brief CLOCK control block. */
  82. typedef struct
  83. {
  84. bool module_initialized; /*< Indicate the state of module */
  85. volatile bool hfclk_on; /*< High-frequency clock state. */
  86. volatile bool lfclk_on; /*< Low-frequency clock state. */
  87. volatile uint32_t hfclk_requests; /*< High-frequency clock request counter. */
  88. volatile nrf_drv_clock_handler_item_t * p_hf_head;
  89. volatile uint32_t lfclk_requests; /*< Low-frequency clock request counter. */
  90. volatile nrf_drv_clock_handler_item_t * p_lf_head;
  91. #if CALIBRATION_SUPPORT
  92. nrf_drv_clock_handler_item_t cal_hfclk_started_handler_item;
  93. nrf_drv_clock_event_handler_t cal_done_handler;
  94. volatile nrf_drv_clock_cal_state_t cal_state;
  95. #endif // CALIBRATION_SUPPORT
  96. } nrf_drv_clock_cb_t;
  97. static nrf_drv_clock_cb_t m_clock_cb;
  98. static void clock_irq_handler(nrfx_clock_evt_type_t evt);
  99. static void lfclk_stop(void)
  100. {
  101. #if CALIBRATION_SUPPORT
  102. nrfx_clock_calibration_timer_stop();
  103. #endif
  104. #ifdef SOFTDEVICE_PRESENT
  105. // If LFCLK is requested to stop while SD is still enabled,
  106. // it indicates an error in the application.
  107. // Enabling SD should increment the LFCLK request.
  108. ASSERT(!nrf_sdh_is_enabled());
  109. #endif // SOFTDEVICE_PRESENT
  110. nrfx_clock_lfclk_stop();
  111. m_clock_cb.lfclk_on = false;
  112. }
  113. static void hfclk_start(void)
  114. {
  115. #ifdef SOFTDEVICE_PRESENT
  116. if (nrf_sdh_is_enabled())
  117. {
  118. (void)sd_clock_hfclk_request();
  119. return;
  120. }
  121. #endif // SOFTDEVICE_PRESENT
  122. nrfx_clock_hfclk_start();
  123. }
  124. static void hfclk_stop(void)
  125. {
  126. #ifdef SOFTDEVICE_PRESENT
  127. if (nrf_sdh_is_enabled())
  128. {
  129. (void)sd_clock_hfclk_release();
  130. m_clock_cb.hfclk_on = false;
  131. return;
  132. }
  133. #endif // SOFTDEVICE_PRESENT
  134. nrfx_clock_hfclk_stop();
  135. m_clock_cb.hfclk_on = false;
  136. }
  137. bool nrf_drv_clock_init_check(void)
  138. {
  139. return m_clock_cb.module_initialized;
  140. }
  141. ret_code_t nrf_drv_clock_init(void)
  142. {
  143. ret_code_t err_code = NRF_SUCCESS;
  144. if (m_clock_cb.module_initialized)
  145. {
  146. err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED;
  147. }
  148. else
  149. {
  150. m_clock_cb.p_hf_head = NULL;
  151. m_clock_cb.hfclk_requests = 0;
  152. m_clock_cb.p_lf_head = NULL;
  153. m_clock_cb.lfclk_requests = 0;
  154. err_code = nrfx_clock_init(clock_irq_handler);
  155. #ifdef SOFTDEVICE_PRESENT
  156. if (!nrf_sdh_is_enabled())
  157. #endif
  158. {
  159. nrfx_clock_enable();
  160. }
  161. #if CALIBRATION_SUPPORT
  162. m_clock_cb.cal_state = CAL_STATE_IDLE;
  163. #endif
  164. m_clock_cb.module_initialized = true;
  165. }
  166. NRF_LOG_INFO("Function: %s, error code: %s.",
  167. (uint32_t)__func__,
  168. (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
  169. return err_code;
  170. }
  171. void nrf_drv_clock_uninit(void)
  172. {
  173. ASSERT(m_clock_cb.module_initialized);
  174. nrfx_clock_disable();
  175. nrfx_clock_uninit();
  176. m_clock_cb.module_initialized = false;
  177. }
  178. static void item_enqueue(nrf_drv_clock_handler_item_t ** p_head,
  179. nrf_drv_clock_handler_item_t * p_item)
  180. {
  181. nrf_drv_clock_handler_item_t * p_next = *p_head;
  182. while (p_next)
  183. {
  184. if (p_next == p_item)
  185. {
  186. return;
  187. }
  188. p_next = p_next->p_next;
  189. }
  190. p_item->p_next = (*p_head ? *p_head : NULL);
  191. *p_head = p_item;
  192. }
  193. static nrf_drv_clock_handler_item_t * item_dequeue(nrf_drv_clock_handler_item_t ** p_head)
  194. {
  195. nrf_drv_clock_handler_item_t * p_item = *p_head;
  196. if (p_item)
  197. {
  198. *p_head = p_item->p_next;
  199. }
  200. return p_item;
  201. }
  202. void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item)
  203. {
  204. ASSERT(m_clock_cb.module_initialized);
  205. if (m_clock_cb.lfclk_on)
  206. {
  207. if (p_handler_item)
  208. {
  209. p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_LFCLK_STARTED);
  210. }
  211. CRITICAL_REGION_ENTER();
  212. ++(m_clock_cb.lfclk_requests);
  213. CRITICAL_REGION_EXIT();
  214. }
  215. else
  216. {
  217. CRITICAL_REGION_ENTER();
  218. if (p_handler_item)
  219. {
  220. item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head,
  221. p_handler_item);
  222. }
  223. if (m_clock_cb.lfclk_requests == 0)
  224. {
  225. nrfx_clock_lfclk_start();
  226. }
  227. ++(m_clock_cb.lfclk_requests);
  228. CRITICAL_REGION_EXIT();
  229. }
  230. ASSERT(m_clock_cb.lfclk_requests > 0);
  231. }
  232. void nrf_drv_clock_lfclk_release(void)
  233. {
  234. ASSERT(m_clock_cb.module_initialized);
  235. ASSERT(m_clock_cb.lfclk_requests > 0);
  236. CRITICAL_REGION_ENTER();
  237. --(m_clock_cb.lfclk_requests);
  238. if (m_clock_cb.lfclk_requests == 0)
  239. {
  240. lfclk_stop();
  241. }
  242. CRITICAL_REGION_EXIT();
  243. }
  244. bool nrf_drv_clock_lfclk_is_running(void)
  245. {
  246. ASSERT(m_clock_cb.module_initialized);
  247. #ifdef SOFTDEVICE_PRESENT
  248. if (nrf_sdh_is_enabled())
  249. {
  250. return true;
  251. }
  252. #endif // SOFTDEVICE_PRESENT
  253. return nrfx_clock_lfclk_is_running();
  254. }
  255. void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item)
  256. {
  257. ASSERT(m_clock_cb.module_initialized);
  258. if (m_clock_cb.hfclk_on)
  259. {
  260. if (p_handler_item)
  261. {
  262. p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
  263. }
  264. CRITICAL_REGION_ENTER();
  265. ++(m_clock_cb.hfclk_requests);
  266. CRITICAL_REGION_EXIT();
  267. }
  268. else
  269. {
  270. CRITICAL_REGION_ENTER();
  271. if (p_handler_item)
  272. {
  273. item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head,
  274. p_handler_item);
  275. }
  276. if (m_clock_cb.hfclk_requests == 0)
  277. {
  278. hfclk_start();
  279. }
  280. ++(m_clock_cb.hfclk_requests);
  281. CRITICAL_REGION_EXIT();
  282. }
  283. ASSERT(m_clock_cb.hfclk_requests > 0);
  284. }
  285. void nrf_drv_clock_hfclk_release(void)
  286. {
  287. ASSERT(m_clock_cb.module_initialized);
  288. ASSERT(m_clock_cb.hfclk_requests > 0);
  289. CRITICAL_REGION_ENTER();
  290. --(m_clock_cb.hfclk_requests);
  291. if (m_clock_cb.hfclk_requests == 0)
  292. {
  293. hfclk_stop();
  294. }
  295. CRITICAL_REGION_EXIT();
  296. }
  297. bool nrf_drv_clock_hfclk_is_running(void)
  298. {
  299. ASSERT(m_clock_cb.module_initialized);
  300. #ifdef SOFTDEVICE_PRESENT
  301. if (nrf_sdh_is_enabled())
  302. {
  303. uint32_t is_running;
  304. UNUSED_VARIABLE(sd_clock_hfclk_is_running(&is_running));
  305. return (is_running ? true : false);
  306. }
  307. #endif // SOFTDEVICE_PRESENT
  308. return nrfx_clock_hfclk_is_running();
  309. }
  310. #if CALIBRATION_SUPPORT
  311. static void clock_calibration_hf_started(nrf_drv_clock_evt_type_t event)
  312. {
  313. if (m_clock_cb.cal_state == CAL_STATE_ABORT)
  314. {
  315. nrf_drv_clock_hfclk_release();
  316. m_clock_cb.cal_state = CAL_STATE_IDLE;
  317. if (m_clock_cb.cal_done_handler)
  318. {
  319. m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED);
  320. }
  321. }
  322. else
  323. {
  324. ASSERT(event == NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
  325. if (nrfx_clock_calibration_start() != NRFX_SUCCESS)
  326. {
  327. ASSERT(false);
  328. }
  329. }
  330. }
  331. #endif // CALIBRATION_SUPPORT
  332. ret_code_t nrf_drv_clock_calibration_start(uint8_t interval, nrf_drv_clock_event_handler_t handler)
  333. {
  334. ret_code_t err_code = NRF_SUCCESS;
  335. #if CALIBRATION_SUPPORT
  336. ASSERT(m_clock_cb.cal_state == CAL_STATE_IDLE);
  337. if (m_clock_cb.lfclk_on == false)
  338. {
  339. err_code = NRF_ERROR_INVALID_STATE;
  340. }
  341. else if (m_clock_cb.cal_state == CAL_STATE_IDLE)
  342. {
  343. m_clock_cb.cal_done_handler = handler;
  344. m_clock_cb.cal_hfclk_started_handler_item.event_handler = clock_calibration_hf_started;
  345. if (interval == 0)
  346. {
  347. m_clock_cb.cal_state = CAL_STATE_HFCLK_REQ;
  348. nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item);
  349. }
  350. else
  351. {
  352. m_clock_cb.cal_state = CAL_STATE_CT;
  353. nrfx_clock_calibration_timer_start(interval);
  354. }
  355. }
  356. else
  357. {
  358. err_code = NRF_ERROR_BUSY;
  359. }
  360. NRF_LOG_WARNING("Function: %s, error code: %s.",
  361. (uint32_t)__func__,
  362. (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
  363. return err_code;
  364. #else
  365. UNUSED_PARAMETER(interval);
  366. UNUSED_PARAMETER(handler);
  367. err_code = NRF_ERROR_FORBIDDEN;
  368. NRF_LOG_WARNING("Function: %s, error code: %s.",
  369. (uint32_t)__func__,
  370. (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
  371. return err_code;
  372. #endif // CALIBRATION_SUPPORT
  373. }
  374. ret_code_t nrf_drv_clock_calibration_abort(void)
  375. {
  376. ret_code_t err_code = NRF_SUCCESS;
  377. #if CALIBRATION_SUPPORT
  378. CRITICAL_REGION_ENTER();
  379. switch (m_clock_cb.cal_state)
  380. {
  381. case CAL_STATE_CT:
  382. nrfx_clock_calibration_timer_stop();
  383. m_clock_cb.cal_state = CAL_STATE_IDLE;
  384. if (m_clock_cb.cal_done_handler)
  385. {
  386. m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED);
  387. }
  388. break;
  389. case CAL_STATE_HFCLK_REQ:
  390. /* fall through. */
  391. case CAL_STATE_CAL:
  392. m_clock_cb.cal_state = CAL_STATE_ABORT;
  393. break;
  394. default:
  395. break;
  396. }
  397. CRITICAL_REGION_EXIT();
  398. NRF_LOG_INFO("Function: %s, error code: %s.",
  399. (uint32_t)__func__,
  400. (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
  401. return err_code;
  402. #else
  403. err_code = NRF_ERROR_FORBIDDEN;
  404. NRF_LOG_WARNING("Function: %s, error code: %s.",
  405. (uint32_t)__func__,
  406. (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
  407. return err_code;
  408. #endif // CALIBRATION_SUPPORT
  409. }
  410. ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating)
  411. {
  412. ret_code_t err_code = NRF_SUCCESS;
  413. #if CALIBRATION_SUPPORT
  414. ASSERT(m_clock_cb.module_initialized);
  415. *p_is_calibrating = (m_clock_cb.cal_state != CAL_STATE_IDLE);
  416. NRF_LOG_INFO("Function: %s, error code: %s.",
  417. (uint32_t)__func__,
  418. (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
  419. return err_code;
  420. #else
  421. UNUSED_PARAMETER(p_is_calibrating);
  422. err_code = NRF_ERROR_FORBIDDEN;
  423. NRF_LOG_WARNING("Function: %s, error code: %s.",
  424. (uint32_t)__func__,
  425. (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
  426. return err_code;
  427. #endif // CALIBRATION_SUPPORT
  428. }
  429. __STATIC_INLINE void clock_clk_started_notify(nrf_drv_clock_evt_type_t evt_type)
  430. {
  431. nrf_drv_clock_handler_item_t **p_head;
  432. if (evt_type == NRF_DRV_CLOCK_EVT_HFCLK_STARTED)
  433. {
  434. p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head;
  435. }
  436. else
  437. {
  438. p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head;
  439. }
  440. while (1)
  441. {
  442. nrf_drv_clock_handler_item_t * p_item = item_dequeue(p_head);
  443. if (!p_item)
  444. {
  445. break;
  446. }
  447. p_item->event_handler(evt_type);
  448. }
  449. }
  450. static void clock_irq_handler(nrfx_clock_evt_type_t evt)
  451. {
  452. if (evt == NRFX_CLOCK_EVT_HFCLK_STARTED)
  453. {
  454. m_clock_cb.hfclk_on = true;
  455. clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
  456. }
  457. if (evt == NRFX_CLOCK_EVT_LFCLK_STARTED)
  458. {
  459. m_clock_cb.lfclk_on = true;
  460. clock_clk_started_notify(NRF_DRV_CLOCK_EVT_LFCLK_STARTED);
  461. }
  462. #if CALIBRATION_SUPPORT
  463. if (evt == NRFX_CLOCK_EVT_CTTO)
  464. {
  465. nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item);
  466. }
  467. if (evt == NRFX_CLOCK_EVT_CAL_DONE)
  468. {
  469. nrf_drv_clock_hfclk_release();
  470. bool aborted = (m_clock_cb.cal_state == CAL_STATE_ABORT);
  471. m_clock_cb.cal_state = CAL_STATE_IDLE;
  472. if (m_clock_cb.cal_done_handler)
  473. {
  474. m_clock_cb.cal_done_handler(aborted ?
  475. NRF_DRV_CLOCK_EVT_CAL_ABORTED : NRF_DRV_CLOCK_EVT_CAL_DONE);
  476. }
  477. }
  478. #endif // CALIBRATION_SUPPORT
  479. }
  480. #ifdef SOFTDEVICE_PRESENT
  481. /**
  482. * @brief SoftDevice SoC event handler.
  483. *
  484. * @param[in] evt_id SoC event.
  485. * @param[in] p_context Context.
  486. */
  487. static void soc_evt_handler(uint32_t evt_id, void * p_context)
  488. {
  489. if (evt_id == NRF_EVT_HFCLKSTARTED)
  490. {
  491. m_clock_cb.hfclk_on = true;
  492. clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
  493. }
  494. }
  495. NRF_SDH_SOC_OBSERVER(m_soc_evt_observer, CLOCK_CONFIG_SOC_OBSERVER_PRIO, soc_evt_handler, NULL);
  496. /**
  497. * @brief SoftDevice enable/disable state handler.
  498. *
  499. * @param[in] state State.
  500. * @param[in] p_context Context.
  501. */
  502. static void sd_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context)
  503. {
  504. switch (state)
  505. {
  506. case NRF_SDH_EVT_STATE_ENABLE_PREPARE:
  507. NVIC_DisableIRQ(POWER_CLOCK_IRQn);
  508. break;
  509. case NRF_SDH_EVT_STATE_ENABLED:
  510. CRITICAL_REGION_ENTER();
  511. /* Make sure that nrf_drv_clock module is initialized */
  512. if (!m_clock_cb.module_initialized)
  513. {
  514. (void)nrf_drv_clock_init();
  515. }
  516. /* SD is one of the LFCLK requesters, but it will enable it by itself. */
  517. ++(m_clock_cb.lfclk_requests);
  518. m_clock_cb.lfclk_on = true;
  519. CRITICAL_REGION_EXIT();
  520. break;
  521. case NRF_SDH_EVT_STATE_DISABLED:
  522. /* Reinit interrupts */
  523. ASSERT(m_clock_cb.module_initialized);
  524. nrfx_clock_enable();
  525. /* SD leaves LFCLK enabled - disable it if it is no longer required. */
  526. nrf_drv_clock_lfclk_release();
  527. break;
  528. default:
  529. break;
  530. }
  531. }
  532. NRF_SDH_STATE_OBSERVER(m_sd_state_observer, CLOCK_CONFIG_STATE_OBSERVER_PRIO) =
  533. {
  534. .handler = sd_state_evt_handler,
  535. .p_context = NULL,
  536. };
  537. #endif // SOFTDEVICE_PRESENT
  538. #undef NRF_CLOCK_LFCLK_RC
  539. #undef NRF_CLOCK_LFCLK_Xtal
  540. #undef NRF_CLOCK_LFCLK_Synth
  541. #endif // NRF_MODULE_ENABLED(NRF_CLOCK)