gc2145_regs.h 2.9 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485
  1. /*
  2. * GC2145 register definitions.
  3. */
  4. #ifndef __GC2145_REG_REGS_H__
  5. #define __GC2145_REG_REGS_H__
  6. #define CHIP_ID_HIGH 0XF0
  7. #define CHIP_ID_LOW 0XF1
  8. #define PLL_MODE1 0XF7
  9. #define PLL_MODE2 0XF8
  10. #define CM_MODE 0XF9
  11. #define CLK_DIV_MODE 0XFA
  12. #define RESET_RELATED 0xfe // Bit[7]: Software reset
  13. // Bit[6]: cm reset
  14. // Bit[5]: mipi reset
  15. // Bit[4]: CISCTL_restart_n
  16. // Bit[3]: NA
  17. // Bit[2:0]: page select
  18. // 000:page0
  19. // 001:page1
  20. // 010:page2
  21. // 011:page3
  22. //-page0----------------
  23. #define P0_EXPOSURE_HIGH 0X03
  24. #define P0_EXPOSURE_LOW 0X04
  25. #define P0_HB_HIGH 0X05
  26. #define P0_HB_LOW 0X06
  27. #define P0_VB_HIGH 0X07
  28. #define P0_VB_LOW 0X08
  29. #define P0_ROW_START_HIGH 0X09
  30. #define P0_ROW_START_LOW 0X0A
  31. #define P0_COL_START_HIGH 0X0B
  32. #define P0_COL_START_LOW 0X0C
  33. #define P0_WIN_HEIGHT_HIGH 0X0D
  34. #define P0_WIN_HEIGHT_LOW 0X0E
  35. #define P0_WIN_WIDTH_HIGH 0X0F
  36. #define P0_WIN_WIDTH_LOW 0X10
  37. #define P0_ANALOG_MODE1 0X17
  38. #define P0_ANALOG_MODE2 0X18
  39. #define P0_SPECIAL_EFFECT 0X83
  40. #define P0_OUTPUT_FORMAT 0x84 // Format select
  41. // Bit[7]:YUV420 row switch
  42. // Bit[6]:YUV420 col switch
  43. // Bit[7]:YUV420_legacy
  44. // Bit[4:0]:output data mode
  45. // 5’h00 Cb Y Cr Y
  46. // 5’h01 Cr Y Cb Y
  47. // 5’h02 Y Cb Y Cr
  48. // 5’h03 Y Cr Y Cb
  49. // 5’h04 LSC bypass, C/Y
  50. // 5’h05 LSC bypass, Y/C
  51. // 5’h06 RGB 565
  52. // 5’h0f bypass 10bits
  53. // 5’h17 switch odd/even column /row to controls output Bayer pattern
  54. // 00 RGBG
  55. // 01 RGGB
  56. // 10 BGGR
  57. // 11 GBRG
  58. // 5'h18 DNDD out mode
  59. // 5'h19 LSC out mode
  60. // 5;h1b EEINTP out mode
  61. #define P0_FRAME_START 0X85
  62. #define P0_SYNC_MODE 0X86
  63. #define P0_MODULE_GATING 0X88
  64. #define P0_BYPASS_MODE 0X89
  65. #define P0_DEBUG_MODE2 0X8C
  66. #define P0_DEBUG_MODE3 0X8D
  67. #define P0_CROP_ENABLE 0X90
  68. #define P0_OUT_WIN_Y1_HIGH 0X91
  69. #define P0_OUT_WIN_Y1_LOW 0X92
  70. #define P0_OUT_WIN_X1_HIGH 0X93
  71. #define P0_OUT_WIN_X1_LOW 0X94
  72. #define P0_OUT_WIN_HEIGHT_HIGH 0X95
  73. #define P0_OUT_WIN_HEIGHT_LOW 0X96
  74. #define P0_OUT_WIN_WIDTH_HIGH 0X97
  75. #define P0_OUT_WIN_WIDTH_LOW 0X98
  76. #define P0_SUBSAMPLE 0X99
  77. #define P0_SUBSAMPLE_MODE 0X9A
  78. #endif // __GC2145_REG_REGS_H__