ses_startup_nrf_common.s 8.8 KB

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  1. /***********************************************************************************
  2. * SEGGER Microcontroller GmbH *
  3. * The Embedded Experts *
  4. ***********************************************************************************
  5. * *
  6. * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
  7. * *
  8. * www.segger.com Support: support@segger.com *
  9. * *
  10. ***********************************************************************************
  11. * *
  12. * All rights reserved. *
  13. * *
  14. * Redistribution and use in source and binary forms, with or *
  15. * without modification, are permitted provided that the following *
  16. * conditions are met: *
  17. * *
  18. * - Redistributions of source code must retain the above copyright *
  19. * notice, this list of conditions and the following disclaimer. *
  20. * *
  21. * - Neither the name of SEGGER Microcontroller GmbH *
  22. * nor the names of its contributors may be used to endorse or *
  23. * promote products derived from this software without specific *
  24. * prior written permission. *
  25. * *
  26. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
  27. * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
  28. * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
  29. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
  30. * DISCLAIMED. *
  31. * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
  32. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
  34. * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
  35. * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
  36. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
  37. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
  38. * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
  39. * DAMAGE. *
  40. * *
  41. ***********************************************************************************
  42. * *
  43. * This file has been modified by Nordic Semiconductor: *
  44. * To separate out device-specific data *
  45. * *
  46. ***********************************************************************************/
  47. /************************************************************************************
  48. * Preprocessor Definitions *
  49. * ------------------------ *
  50. * NO_FPU_ENABLE *
  51. * *
  52. * If defined, FPU will not be enabled. *
  53. * *
  54. * NO_STACK_INIT *
  55. * *
  56. * If defined, the stack pointer will not be initialised. *
  57. * *
  58. * NO_SYSTEM_INIT *
  59. * *
  60. * If defined, the SystemInit() function will not be called. By default *
  61. * SystemInit() is called after reset to enable the clocks and memories to *
  62. * be initialised prior to any C startup initialisation. *
  63. * *
  64. * NO_VTOR_CONFIG *
  65. * *
  66. * If defined, the vector table offset register will not be configured. *
  67. * *
  68. * MEMORY_INIT *
  69. * *
  70. * If defined, the MemoryInit() function will be called. By default *
  71. * MemoryInit() is called after SystemInit() to enable an external memory *
  72. * controller. *
  73. * *
  74. * STACK_INIT_VAL *
  75. * *
  76. * If defined, specifies the initial stack pointer value. If undefined, *
  77. * the stack pointer will be initialised to point to the end of the *
  78. * RAM segment. *
  79. * *
  80. * VECTORS_IN_RAM *
  81. * *
  82. * If defined, the exception vectors will be copied from Flash to RAM. *
  83. * *
  84. ************************************************************************************/
  85. .syntax unified
  86. .global Reset_Handler
  87. #ifdef INITIALIZE_USER_SECTIONS
  88. .global InitializeUserMemorySections
  89. #endif
  90. .extern _vectors
  91. .extern nRFInitialize
  92. .global afterInitialize
  93. .section .init, "ax"
  94. .thumb_func
  95. .equ VTOR_REG, 0xE000ED08
  96. .equ FPU_CPACR_REG, 0xE000ED88
  97. #ifndef STACK_INIT_VAL
  98. #define STACK_INIT_VAL __RAM1_segment_end__
  99. #endif
  100. Reset_Handler:
  101. /* Perform prestart tasks. */
  102. b nRFInitialize
  103. .thumb_func
  104. afterInitialize:
  105. #ifndef NO_STACK_INIT
  106. /* Initialise main stack */
  107. ldr r0, =STACK_INIT_VAL
  108. ldr r1, =0x7
  109. bics r0, r1
  110. mov sp, r0
  111. #endif
  112. #ifndef NO_SYSTEM_INIT
  113. /* Initialise system */
  114. ldr r0, =SystemInit
  115. blx r0
  116. #endif
  117. #ifdef MEMORY_INIT
  118. ldr r0, =MemoryInit
  119. blx r0
  120. #endif
  121. #ifdef VECTORS_IN_RAM
  122. /* Copy exception vectors into RAM */
  123. ldr r0, =__vectors_start__
  124. ldr r1, =__vectors_end__
  125. ldr r2, =__vectors_ram_start__
  126. 1:
  127. cmp r0, r1
  128. beq 2f
  129. ldr r3, [r0]
  130. str r3, [r2]
  131. adds r0, r0, #4
  132. adds r2, r2, #4
  133. b 1b
  134. 2:
  135. #endif
  136. #ifndef NO_VTOR_CONFIG
  137. /* Configure vector table offset register */
  138. ldr r0, =VTOR_REG
  139. #ifdef VECTORS_IN_RAM
  140. ldr r1, =_vectors_ram
  141. #else
  142. ldr r1, =_vectors
  143. #endif
  144. str r1, [r0]
  145. #endif
  146. #if (defined(__ARM_ARCH_FPV4_SP_D16__) || defined(__ARM_ARCH_FPV5_D16__)) && !defined(NO_FPU_ENABLE)
  147. /* Enable FPU */
  148. ldr r0, =FPU_CPACR_REG
  149. ldr r1, [r0]
  150. orr r1, r1, #(0xF << 20)
  151. str r1, [r0]
  152. dsb
  153. isb
  154. #endif
  155. /* Jump to program start */
  156. b _start
  157. #ifdef INITIALIZE_USER_SECTIONS
  158. .thumb_func
  159. InitializeUserMemorySections:
  160. ldr r0, =__start_nrf_sections
  161. ldr r1, =__start_nrf_sections_run
  162. ldr r2, =__end_nrf_sections_run
  163. cmp r0, r1
  164. beq 2f
  165. subs r2, r2, r1
  166. beq 2f
  167. 1:
  168. ldrb r3, [r0]
  169. adds r0, r0, #1
  170. strb r3, [r1]
  171. adds r1, r1, #1
  172. subs r2, r2, #1
  173. bne 1b
  174. 2:
  175. bx lr
  176. #endif