nrf_twis.h 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778
  1. /**
  2. * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef NRF_TWIS_H__
  41. #define NRF_TWIS_H__
  42. #include <nrfx.h>
  43. #ifdef __cplusplus
  44. extern "C" {
  45. #endif
  46. /**
  47. * @defgroup nrf_twis_hal TWIS HAL
  48. * @{
  49. * @ingroup nrf_twis
  50. * @brief Hardware access layer for managing the Two Wire Interface Slave with EasyDMA
  51. * (TWIS) peripheral.
  52. */
  53. /**
  54. * @brief TWIS tasks
  55. */
  56. typedef enum
  57. {
  58. /*lint -save -e30*/
  59. NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction */
  60. NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction */
  61. NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction */
  62. NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */
  63. NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command */
  64. /*lint -restore*/
  65. } nrf_twis_task_t;
  66. /**
  67. * @brief TWIS events
  68. */
  69. typedef enum
  70. {
  71. /*lint -save -e30*/
  72. NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped */
  73. NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error */
  74. NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started */
  75. NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started */
  76. NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received */
  77. NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received */
  78. /*lint -restore*/
  79. } nrf_twis_event_t;
  80. /**
  81. * @brief TWIS shortcuts
  82. */
  83. typedef enum
  84. {
  85. NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task */
  86. NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task */
  87. } nrf_twis_short_mask_t;
  88. /**
  89. * @brief TWIS interrupts
  90. */
  91. typedef enum
  92. {
  93. NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event */
  94. NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event */
  95. NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event */
  96. NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event */
  97. NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event */
  98. NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event */
  99. } nrf_twis_int_mask_t;
  100. /**
  101. * @brief TWIS error source
  102. */
  103. typedef enum
  104. {
  105. NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */
  106. NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte */
  107. NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented */
  108. } nrf_twis_error_t;
  109. /**
  110. * @brief TWIS address matching configuration
  111. */
  112. typedef enum
  113. {
  114. NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0] */
  115. NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1] */
  116. NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching */
  117. } nrf_twis_config_addr_mask_t;
  118. /**
  119. * @brief Variable type to hold amount of data for EasyDMA
  120. *
  121. * Variable of the minimum size that can hold the amount of data to transfer.
  122. *
  123. * @note
  124. * Defined to make it simple to change if EasyDMA would be updated to support more data in
  125. * the future devices to.
  126. */
  127. typedef uint8_t nrf_twis_amount_t;
  128. /**
  129. * @brief Smallest variable type to hold TWI address
  130. *
  131. * Variable of the minimum size that can hold single TWI address.
  132. *
  133. * @note
  134. * Defined to make it simple to change if new TWI would support for example
  135. * 10 bit addressing mode.
  136. */
  137. typedef uint8_t nrf_twis_address_t;
  138. /**
  139. * @brief Function for activating a specific TWIS task.
  140. *
  141. * @param[in] p_reg Pointer to the peripheral registers structure.
  142. * @param task Task.
  143. */
  144. __STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task);
  145. /**
  146. * @brief Function for returning the address of a specific TWIS task register.
  147. *
  148. * @param[in] p_reg Pointer to the peripheral registers structure.
  149. * @param task Task.
  150. *
  151. * @return Task address.
  152. */
  153. __STATIC_INLINE uint32_t nrf_twis_task_address_get(
  154. NRF_TWIS_Type const * const p_reg,
  155. nrf_twis_task_t task);
  156. /**
  157. * @brief Function for clearing a specific event.
  158. *
  159. * @param[in] p_reg Pointer to the peripheral registers structure.
  160. * @param event Event.
  161. */
  162. __STATIC_INLINE void nrf_twis_event_clear(
  163. NRF_TWIS_Type * const p_reg,
  164. nrf_twis_event_t event);
  165. /**
  166. * @brief Function for returning the state of a specific event.
  167. *
  168. * @param[in] p_reg Pointer to the peripheral registers structure.
  169. * @param event Event.
  170. *
  171. * @retval true If the event is set.
  172. * @retval false If the event is not set.
  173. */
  174. __STATIC_INLINE bool nrf_twis_event_check(
  175. NRF_TWIS_Type const * const p_reg,
  176. nrf_twis_event_t event);
  177. /**
  178. * @brief Function for getting and clearing the state of specific event
  179. *
  180. * This function checks the state of the event and clears it.
  181. * @param[in,out] p_reg Pointer to the peripheral registers structure.
  182. * @param event Event.
  183. *
  184. * @retval true If the event was set.
  185. * @retval false If the event was not set.
  186. */
  187. __STATIC_INLINE bool nrf_twis_event_get_and_clear(
  188. NRF_TWIS_Type * const p_reg,
  189. nrf_twis_event_t event);
  190. /**
  191. * @brief Function for returning the address of a specific TWIS event register.
  192. *
  193. * @param[in] p_reg Pointer to the peripheral registers structure.
  194. * @param event Event.
  195. *
  196. * @return Address.
  197. */
  198. __STATIC_INLINE uint32_t nrf_twis_event_address_get(
  199. NRF_TWIS_Type const * const p_reg,
  200. nrf_twis_event_t event);
  201. /**
  202. * @brief Function for setting a shortcut.
  203. *
  204. * @param[in] p_reg Pointer to the peripheral registers structure.
  205. * @param short_mask Shortcuts mask.
  206. */
  207. __STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
  208. /**
  209. * @brief Function for clearing shortcuts.
  210. *
  211. * @param[in] p_reg Pointer to the peripheral registers structure.
  212. * @param short_mask Shortcuts mask.
  213. */
  214. __STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
  215. /**
  216. * @brief Get the shorts mask
  217. *
  218. * Function returns shorts register.
  219. * @param[in] p_reg Pointer to the peripheral registers structure.
  220. * @return Flags of currently enabled shortcuts
  221. */
  222. __STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg);
  223. /**
  224. * @brief Function for enabling selected interrupts.
  225. *
  226. * @param[in] p_reg Pointer to the peripheral registers structure.
  227. * @param int_mask Interrupts mask.
  228. */
  229. __STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
  230. /**
  231. * @brief Function for retrieving the state of selected interrupts.
  232. *
  233. * @param[in] p_reg Pointer to the peripheral registers structure.
  234. * @param int_mask Interrupts mask.
  235. *
  236. * @retval true If any of selected interrupts is enabled.
  237. * @retval false If none of selected interrupts is enabled.
  238. */
  239. __STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask);
  240. /**
  241. * @brief Function for disabling selected interrupts.
  242. *
  243. * @param[in] p_reg Pointer to the peripheral registers structure.
  244. * @param int_mask Interrupts mask.
  245. */
  246. __STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
  247. #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
  248. /**
  249. * @brief Function for setting the subscribe configuration for a given
  250. * TWIS task.
  251. *
  252. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  253. * @param[in] task Task for which to set the configuration.
  254. * @param[in] channel Channel through which to subscribe events.
  255. */
  256. __STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg,
  257. nrf_twis_task_t task,
  258. uint8_t channel);
  259. /**
  260. * @brief Function for clearing the subscribe configuration for a given
  261. * TWIS task.
  262. *
  263. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  264. * @param[in] task Task for which to clear the configuration.
  265. */
  266. __STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg,
  267. nrf_twis_task_t task);
  268. /**
  269. * @brief Function for setting the publish configuration for a given
  270. * TWIS event.
  271. *
  272. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  273. * @param[in] event Event for which to set the configuration.
  274. * @param[in] channel Channel through which to publish the event.
  275. */
  276. __STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg,
  277. nrf_twis_event_t event,
  278. uint8_t channel);
  279. /**
  280. * @brief Function for clearing the publish configuration for a given
  281. * TWIS event.
  282. *
  283. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  284. * @param[in] event Event for which to clear the configuration.
  285. */
  286. __STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg,
  287. nrf_twis_event_t event);
  288. #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
  289. /**
  290. * @brief Function for retrieving and clearing the TWIS error source.
  291. *
  292. * @attention Error sources are cleared after read.
  293. * @param[in] p_reg Pointer to the peripheral registers structure.
  294. * @return Error source mask with values from @ref nrf_twis_error_t.
  295. */
  296. __STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg);
  297. /**
  298. * @brief Get information which of addresses matched
  299. *
  300. * Function returns index in the address table
  301. * that points to the address that already matched.
  302. * @param[in] p_reg Pointer to the peripheral registers structure.
  303. * @return Index of matched address
  304. */
  305. __STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg);
  306. /**
  307. * @brief Function for enabling TWIS.
  308. *
  309. * @param[in] p_reg Pointer to the peripheral registers structure.
  310. */
  311. __STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg);
  312. /**
  313. * @brief Function for disabling TWIS.
  314. *
  315. * @param[in] p_reg Pointer to the peripheral registers structure.
  316. */
  317. __STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg);
  318. /**
  319. * @brief Function for configuring TWIS pins.
  320. *
  321. * @param[in] p_reg Pointer to the peripheral registers structure.
  322. * @param scl SCL pin number.
  323. * @param sda SDA pin number.
  324. */
  325. __STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda);
  326. /**
  327. * @brief Function for setting the receive buffer.
  328. *
  329. * @param[in] p_reg Pointer to the peripheral registers structure.
  330. * @param p_buf Pointer to the buffer for received data.
  331. * @param length Maximum number of data bytes to receive.
  332. */
  333. __STATIC_INLINE void nrf_twis_rx_buffer_set(
  334. NRF_TWIS_Type * const p_reg,
  335. uint8_t * p_buf,
  336. nrf_twis_amount_t length);
  337. /**
  338. * @brief Function that prepares TWIS for receiving
  339. *
  340. * This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task.
  341. * @param[in] p_reg Pointer to the peripheral registers structure.
  342. * @param p_buf Pointer to the buffer for received data.
  343. * @param length Maximum number of data bytes to receive.
  344. */
  345. __STATIC_INLINE void nrf_twis_rx_prepare(
  346. NRF_TWIS_Type * const p_reg,
  347. uint8_t * p_buf,
  348. nrf_twis_amount_t length);
  349. /**
  350. * @brief Function for getting number of bytes received in the last transaction.
  351. *
  352. * @param[in] p_reg TWIS instance.
  353. * @return Amount of bytes received.
  354. * */
  355. __STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg);
  356. /**
  357. * @brief Function for setting the transmit buffer.
  358. *
  359. * @param[in] p_reg Pointer to the peripheral registers structure.
  360. * @param p_buf Pointer to the buffer with data to send.
  361. * @param length Maximum number of data bytes to transmit.
  362. */
  363. __STATIC_INLINE void nrf_twis_tx_buffer_set(
  364. NRF_TWIS_Type * const p_reg,
  365. uint8_t const * p_buf,
  366. nrf_twis_amount_t length);
  367. /**
  368. * @brief Function that prepares TWIS for transmitting
  369. *
  370. * This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task.
  371. * @param[in] p_reg Pointer to the peripheral registers structure.
  372. * @param p_buf Pointer to the buffer with data to send.
  373. * @param length Maximum number of data bytes to transmit.
  374. */
  375. __STATIC_INLINE void nrf_twis_tx_prepare(
  376. NRF_TWIS_Type * const p_reg,
  377. uint8_t const * p_buf,
  378. nrf_twis_amount_t length);
  379. /**
  380. * @brief Function for getting number of bytes transmitted in the last transaction.
  381. *
  382. * @param[in] p_reg Pointer to the peripheral registers structure.
  383. * @return Amount of bytes transmitted.
  384. */
  385. __STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg);
  386. /**
  387. * @brief Function for setting slave address
  388. *
  389. * Function sets the selected address for this TWI interface.
  390. * @param[in] p_reg Pointer to the peripheral registers structure.
  391. * @param n Index of address to set
  392. * @param addr Addres to set
  393. * @sa nrf_twis_config_address_set
  394. * @sa nrf_twis_config_address_get
  395. */
  396. __STATIC_INLINE void nrf_twis_address_set(
  397. NRF_TWIS_Type * const p_reg,
  398. uint_fast8_t n,
  399. nrf_twis_address_t addr);
  400. /**
  401. * @brief Function for retrieving configured slave address
  402. *
  403. * Function gets the selected address for this TWI interface.
  404. * @param[in] p_reg Pointer to the peripheral registers structure.
  405. * @param n Index of address to get
  406. */
  407. __STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(
  408. NRF_TWIS_Type const * const p_reg,
  409. uint_fast8_t n);
  410. /**
  411. * @brief Function for setting the device address configuration.
  412. *
  413. * @param[in] p_reg Pointer to the peripheral registers structure.
  414. * @param addr_mask Mask of address indexes of what device should answer to.
  415. *
  416. * @sa nrf_twis_address_set
  417. */
  418. __STATIC_INLINE void nrf_twis_config_address_set(
  419. NRF_TWIS_Type * const p_reg,
  420. nrf_twis_config_addr_mask_t addr_mask);
  421. /**
  422. * @brief Function for retrieving the device address configuration.
  423. *
  424. * @param[in] p_reg Pointer to the peripheral registers structure.
  425. *
  426. * @return Mask of address indexes of what device should answer to.
  427. */
  428. __STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get(
  429. NRF_TWIS_Type const * const p_reg);
  430. /**
  431. * @brief Function for setting the over-read character.
  432. *
  433. * @param[in] p_reg Pointer to the peripheral registers structure.
  434. * @param[in] orc Over-read character. Character clocked out in case of
  435. * over-read of the TXD buffer.
  436. */
  437. __STATIC_INLINE void nrf_twis_orc_set(
  438. NRF_TWIS_Type * const p_reg,
  439. uint8_t orc);
  440. /**
  441. * @brief Function for setting the over-read character.
  442. *
  443. * @param[in] p_reg Pointer to the peripheral registers structure.
  444. *
  445. * @return Over-read character configured for selected instance.
  446. */
  447. __STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg);
  448. /** @} */ /* End of nrf_twis_hal */
  449. #ifndef SUPPRESS_INLINE_IMPLEMENTATION
  450. /* ------------------------------------------------------------------------------------------------
  451. * Internal functions
  452. */
  453. /**
  454. * @internal
  455. * @brief Internal function for getting task/event register address
  456. *
  457. * @param[in] p_reg Pointer to the peripheral registers structure.
  458. * @oaram offset Offset of the register from the instance beginning
  459. *
  460. * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
  461. * @return Pointer to the register
  462. */
  463. __STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset)
  464. {
  465. return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
  466. }
  467. /**
  468. * @internal
  469. * @brief Internal function for getting task/event register address - constant version
  470. *
  471. * @param[in] p_reg Pointer to the peripheral registers structure.
  472. * @oaram offset Offset of the register from the instance beginning
  473. *
  474. * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
  475. * @return Pointer to the register
  476. */
  477. __STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset)
  478. {
  479. return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
  480. }
  481. /* ------------------------------------------------------------------------------------------------
  482. * Interface functions definitions
  483. */
  484. void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task)
  485. {
  486. *(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL;
  487. }
  488. uint32_t nrf_twis_task_address_get(
  489. NRF_TWIS_Type const * const p_reg,
  490. nrf_twis_task_t task)
  491. {
  492. return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task);
  493. }
  494. void nrf_twis_event_clear(
  495. NRF_TWIS_Type * const p_reg,
  496. nrf_twis_event_t event)
  497. {
  498. *(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL;
  499. #if __CORTEX_M == 0x04
  500. volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
  501. (void)dummy;
  502. #endif
  503. }
  504. bool nrf_twis_event_check(
  505. NRF_TWIS_Type const * const p_reg,
  506. nrf_twis_event_t event)
  507. {
  508. return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
  509. }
  510. bool nrf_twis_event_get_and_clear(
  511. NRF_TWIS_Type * const p_reg,
  512. nrf_twis_event_t event)
  513. {
  514. bool ret = nrf_twis_event_check(p_reg, event);
  515. if (ret)
  516. {
  517. nrf_twis_event_clear(p_reg, event);
  518. }
  519. return ret;
  520. }
  521. uint32_t nrf_twis_event_address_get(
  522. NRF_TWIS_Type const * const p_reg,
  523. nrf_twis_event_t event)
  524. {
  525. return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
  526. }
  527. void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
  528. {
  529. p_reg->SHORTS |= short_mask;
  530. }
  531. void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
  532. {
  533. if (~0U == short_mask)
  534. {
  535. /* Optimized version for "disable all" */
  536. p_reg->SHORTS = 0;
  537. }
  538. else
  539. {
  540. p_reg->SHORTS &= ~short_mask;
  541. }
  542. }
  543. uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg)
  544. {
  545. return p_reg->SHORTS;
  546. }
  547. void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
  548. {
  549. p_reg->INTENSET = int_mask;
  550. }
  551. bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask)
  552. {
  553. return (bool)(p_reg->INTENSET & int_mask);
  554. }
  555. void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
  556. {
  557. p_reg->INTENCLR = int_mask;
  558. }
  559. #if defined(DPPI_PRESENT)
  560. __STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg,
  561. nrf_twis_task_t task,
  562. uint8_t channel)
  563. {
  564. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
  565. ((uint32_t)channel | TWIS_SUBSCRIBE_STOP_EN_Msk);
  566. }
  567. __STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg,
  568. nrf_twis_task_t task)
  569. {
  570. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
  571. }
  572. __STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg,
  573. nrf_twis_event_t event,
  574. uint8_t channel)
  575. {
  576. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
  577. ((uint32_t)channel | TWIS_PUBLISH_STOPPED_EN_Msk);
  578. }
  579. __STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg,
  580. nrf_twis_event_t event)
  581. {
  582. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
  583. }
  584. #endif // defined(DPPI_PRESENT)
  585. uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg)
  586. {
  587. uint32_t ret = p_reg->ERRORSRC;
  588. p_reg->ERRORSRC = ret;
  589. return ret;
  590. }
  591. uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg)
  592. {
  593. return (uint_fast8_t)p_reg->MATCH;
  594. }
  595. void nrf_twis_enable(NRF_TWIS_Type * const p_reg)
  596. {
  597. p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos);
  598. }
  599. void nrf_twis_disable(NRF_TWIS_Type * const p_reg)
  600. {
  601. p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos);
  602. }
  603. void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda)
  604. {
  605. p_reg->PSEL.SCL = scl;
  606. p_reg->PSEL.SDA = sda;
  607. }
  608. void nrf_twis_rx_buffer_set(
  609. NRF_TWIS_Type * const p_reg,
  610. uint8_t * p_buf,
  611. nrf_twis_amount_t length)
  612. {
  613. p_reg->RXD.PTR = (uint32_t)p_buf;
  614. p_reg->RXD.MAXCNT = length;
  615. }
  616. __STATIC_INLINE void nrf_twis_rx_prepare(
  617. NRF_TWIS_Type * const p_reg,
  618. uint8_t * p_buf,
  619. nrf_twis_amount_t length)
  620. {
  621. nrf_twis_rx_buffer_set(p_reg, p_buf, length);
  622. nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX);
  623. }
  624. nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg)
  625. {
  626. return (nrf_twis_amount_t)p_reg->RXD.AMOUNT;
  627. }
  628. void nrf_twis_tx_buffer_set(
  629. NRF_TWIS_Type * const p_reg,
  630. uint8_t const * p_buf,
  631. nrf_twis_amount_t length)
  632. {
  633. p_reg->TXD.PTR = (uint32_t)p_buf;
  634. p_reg->TXD.MAXCNT = length;
  635. }
  636. __STATIC_INLINE void nrf_twis_tx_prepare(
  637. NRF_TWIS_Type * const p_reg,
  638. uint8_t const * p_buf,
  639. nrf_twis_amount_t length)
  640. {
  641. nrf_twis_tx_buffer_set(p_reg, p_buf, length);
  642. nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX);
  643. }
  644. nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg)
  645. {
  646. return (nrf_twis_amount_t)p_reg->TXD.AMOUNT;
  647. }
  648. void nrf_twis_address_set(
  649. NRF_TWIS_Type * const p_reg,
  650. uint_fast8_t n,
  651. nrf_twis_address_t addr)
  652. {
  653. p_reg->ADDRESS[n] = addr;
  654. }
  655. nrf_twis_address_t nrf_twis_address_get(
  656. NRF_TWIS_Type const * const p_reg,
  657. uint_fast8_t n)
  658. {
  659. return (nrf_twis_address_t)p_reg->ADDRESS[n];
  660. }
  661. void nrf_twis_config_address_set(
  662. NRF_TWIS_Type * const p_reg,
  663. nrf_twis_config_addr_mask_t addr_mask)
  664. {
  665. /* This is the only configuration in TWIS - just write it without masking */
  666. p_reg->CONFIG = addr_mask;
  667. }
  668. nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg)
  669. {
  670. return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk);
  671. }
  672. void nrf_twis_orc_set(
  673. NRF_TWIS_Type * const p_reg,
  674. uint8_t orc)
  675. {
  676. p_reg->ORC = orc;
  677. }
  678. uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg)
  679. {
  680. return (uint8_t)p_reg->ORC;
  681. }
  682. #endif /* SUPPRESS_INLINE_IMPLEMENTATION */
  683. #ifdef __cplusplus
  684. }
  685. #endif
  686. #endif /* NRF_TWIS_H__ */