nrf_twim.h 21 KB

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  1. /**
  2. * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef NRF_TWIM_H__
  41. #define NRF_TWIM_H__
  42. #include <nrfx.h>
  43. #ifdef __cplusplus
  44. extern "C" {
  45. #endif
  46. /**
  47. * @defgroup nrf_twim_hal TWIM HAL
  48. * @{
  49. * @ingroup nrf_twim
  50. * @brief Hardware access layer for managing the TWIM peripheral.
  51. */
  52. /**
  53. * @brief TWIM tasks.
  54. */
  55. typedef enum
  56. {
  57. /*lint -save -e30*/
  58. NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
  59. NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
  60. NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction.
  61. NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
  62. NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction.
  63. /*lint -restore*/
  64. } nrf_twim_task_t;
  65. /**
  66. * @brief TWIM events.
  67. */
  68. typedef enum
  69. {
  70. /*lint -save -e30*/
  71. NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped.
  72. NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error.
  73. NRF_TWIM_EVENT_SUSPENDED = 0x148, ///< TWI suspended.
  74. NRF_TWIM_EVENT_RXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_RXSTARTED), ///< Receive sequence started.
  75. NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started.
  76. NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte.
  77. NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte.
  78. /*lint -restore*/
  79. } nrf_twim_event_t;
  80. /**
  81. * @brief TWIM shortcuts.
  82. */
  83. typedef enum
  84. {
  85. NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task.
  86. NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK = TWIM_SHORTS_LASTTX_SUSPEND_Msk, ///< Shortcut between LASTTX event and SUSPEND task.
  87. NRF_TWIM_SHORT_LASTTX_STOP_MASK = TWIM_SHORTS_LASTTX_STOP_Msk, ///< Shortcut between LASTTX event and STOP task.
  88. NRF_TWIM_SHORT_LASTRX_STARTTX_MASK = TWIM_SHORTS_LASTRX_STARTTX_Msk, ///< Shortcut between LASTRX event and STARTTX task.
  89. NRF_TWIM_SHORT_LASTRX_STOP_MASK = TWIM_SHORTS_LASTRX_STOP_Msk, ///< Shortcut between LASTRX event and STOP task.
  90. NRF_TWIM_ALL_SHORTS_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk |
  91. TWIM_SHORTS_LASTTX_SUSPEND_Msk |
  92. TWIM_SHORTS_LASTTX_STOP_Msk |
  93. TWIM_SHORTS_LASTRX_STARTTX_Msk |
  94. TWIM_SHORTS_LASTRX_STOP_Msk ///< All TWIM shortcuts.
  95. } nrf_twim_short_mask_t;
  96. /**
  97. * @brief TWIM interrupts.
  98. */
  99. typedef enum
  100. {
  101. NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
  102. NRF_TWIM_INT_ERROR_MASK = TWIM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
  103. NRF_TWIM_INT_SUSPENDED_MASK = TWIM_INTENSET_SUSPENDED_Msk, ///< Interrupt on SUSPENDED event.
  104. NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event.
  105. NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event.
  106. NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event.
  107. NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event.
  108. NRF_TWIM_ALL_INTS_MASK = TWIM_INTENSET_STOPPED_Msk |
  109. TWIM_INTENSET_ERROR_Msk |
  110. TWIM_INTENSET_SUSPENDED_Msk |
  111. TWIM_INTENSET_RXSTARTED_Msk |
  112. TWIM_INTENSET_TXSTARTED_Msk |
  113. TWIM_INTENSET_LASTRX_Msk |
  114. TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event.
  115. } nrf_twim_int_mask_t;
  116. /**
  117. * @brief TWIM master clock frequency.
  118. */
  119. typedef enum
  120. {
  121. NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
  122. NRF_TWIM_FREQ_250K = TWIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps.
  123. NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400 ///< 400 kbps.
  124. } nrf_twim_frequency_t;
  125. /**
  126. * @brief TWIM error source.
  127. */
  128. typedef enum
  129. {
  130. NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
  131. NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk ///< NACK received after sending a data byte.
  132. } nrf_twim_error_t;
  133. /**
  134. * @brief Function for activating a specific TWIM task.
  135. *
  136. * @param[in] p_reg Pointer to the peripheral registers structure.
  137. * @param[in] task Task to activate.
  138. */
  139. __STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
  140. nrf_twim_task_t task);
  141. /**
  142. * @brief Function for getting the address of a specific TWIM task register.
  143. *
  144. * @param[in] p_reg Pointer to the peripheral registers structure.
  145. * @param[in] task Requested task.
  146. *
  147. * @return Address of the specified task register.
  148. */
  149. __STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,
  150. nrf_twim_task_t task);
  151. /**
  152. * @brief Function for clearing a specific TWIM event.
  153. *
  154. * @param[in] p_reg Pointer to the peripheral registers structure.
  155. * @param[in] event Event to clear.
  156. */
  157. __STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
  158. nrf_twim_event_t event);
  159. /**
  160. * @brief Function for checking the state of a specific TWIM event.
  161. *
  162. * @param[in] p_reg Pointer to the peripheral registers structure.
  163. * @param[in] event Event to check.
  164. *
  165. * @retval true If the event is set.
  166. * @retval false If the event is not set.
  167. */
  168. __STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
  169. nrf_twim_event_t event);
  170. /**
  171. * @brief Function for getting the address of a specific TWIM event register.
  172. *
  173. * @param[in] p_reg Pointer to the peripheral registers structure.
  174. * @param[in] event Requested event.
  175. *
  176. * @return Address of the specified event register.
  177. */
  178. __STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg,
  179. nrf_twim_event_t event);
  180. /**
  181. * @brief Function for enabling specified shortcuts.
  182. *
  183. * @param[in] p_reg Pointer to the peripheral registers structure.
  184. * @param[in] shorts_mask Shortcuts to enable.
  185. */
  186. __STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
  187. uint32_t shorts_mask);
  188. /**
  189. * @brief Function for disabling specified shortcuts.
  190. *
  191. * @param[in] p_reg Pointer to the peripheral registers structure.
  192. * @param[in] shorts_mask Shortcuts to disable.
  193. */
  194. __STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
  195. uint32_t shorts_mask);
  196. /**
  197. * @brief Function for enabling specified interrupts.
  198. *
  199. * @param[in] p_reg Pointer to the peripheral registers structure.
  200. * @param[in] int_mask Interrupts to enable.
  201. */
  202. __STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
  203. uint32_t int_mask);
  204. /**
  205. * @brief Function for disabling specified interrupts.
  206. *
  207. * @param[in] p_reg Pointer to the peripheral registers structure.
  208. * @param[in] int_mask Interrupts to disable.
  209. */
  210. __STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
  211. uint32_t int_mask);
  212. /**
  213. * @brief Function for checking the state of a given interrupt.
  214. *
  215. * @param[in] p_reg Pointer to the peripheral registers structure.
  216. * @param[in] int_mask Interrupt to check.
  217. *
  218. * @retval true If the interrupt is enabled.
  219. * @retval false If the interrupt is not enabled.
  220. */
  221. __STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
  222. nrf_twim_int_mask_t int_mask);
  223. #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
  224. /**
  225. * @brief Function for setting the subscribe configuration for a given
  226. * TWIM task.
  227. *
  228. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  229. * @param[in] task Task for which to set the configuration.
  230. * @param[in] channel Channel through which to subscribe events.
  231. */
  232. __STATIC_INLINE void nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,
  233. nrf_twim_task_t task,
  234. uint8_t channel);
  235. /**
  236. * @brief Function for clearing the subscribe configuration for a given
  237. * TWIM task.
  238. *
  239. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  240. * @param[in] task Task for which to clear the configuration.
  241. */
  242. __STATIC_INLINE void nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,
  243. nrf_twim_task_t task);
  244. /**
  245. * @brief Function for setting the publish configuration for a given
  246. * TWIM event.
  247. *
  248. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  249. * @param[in] event Event for which to set the configuration.
  250. * @param[in] channel Channel through which to publish the event.
  251. */
  252. __STATIC_INLINE void nrf_twim_publish_set(NRF_TWIM_Type * p_reg,
  253. nrf_twim_event_t event,
  254. uint8_t channel);
  255. /**
  256. * @brief Function for clearing the publish configuration for a given
  257. * TWIM event.
  258. *
  259. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  260. * @param[in] event Event for which to clear the configuration.
  261. */
  262. __STATIC_INLINE void nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,
  263. nrf_twim_event_t event);
  264. #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
  265. /**
  266. * @brief Function for enabling the TWIM peripheral.
  267. *
  268. * @param[in] p_reg Pointer to the peripheral registers structure.
  269. */
  270. __STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg);
  271. /**
  272. * @brief Function for disabling the TWIM peripheral.
  273. *
  274. * @param[in] p_reg Pointer to the peripheral registers structure.
  275. */
  276. __STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg);
  277. /**
  278. * @brief Function for configuring TWI pins.
  279. *
  280. *
  281. * @param[in] p_reg Pointer to the peripheral registers structure.
  282. * @param[in] scl_pin SCL pin number.
  283. * @param[in] sda_pin SDA pin number.
  284. */
  285. __STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
  286. uint32_t scl_pin,
  287. uint32_t sda_pin);
  288. /**
  289. * @brief Function for setting the TWI master clock frequency.
  290. *
  291. * @param[in] p_reg Pointer to the peripheral registers structure.
  292. * @param[in] frequency TWI frequency.
  293. */
  294. __STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
  295. nrf_twim_frequency_t frequency);
  296. /**
  297. * @brief Function for checking the TWI error source.
  298. *
  299. * The error flags are cleared after reading.
  300. *
  301. * @param[in] p_reg Pointer to the peripheral registers structure.
  302. *
  303. * @return Mask with error source flags.
  304. */
  305. __STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg);
  306. /**
  307. * @brief Function for setting the address to be used in TWI transfers.
  308. *
  309. * @param[in] p_reg Pointer to the peripheral registers structure.
  310. * @param[in] address Address to be used in transfers.
  311. */
  312. __STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
  313. uint8_t address);
  314. /**
  315. * @brief Function for setting the transmit buffer.
  316. *
  317. * @param[in] p_reg Pointer to the peripheral registers structure.
  318. * @param[in] p_buffer Pointer to the buffer with data to send.
  319. * @param[in] length Maximum number of data bytes to transmit.
  320. */
  321. __STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
  322. uint8_t const * p_buffer,
  323. size_t length);
  324. /**
  325. * @brief Function for setting the receive buffer.
  326. *
  327. * @param[in] p_reg Pointer to the peripheral registers structure.
  328. * @param[in] p_buffer Pointer to the buffer for received data.
  329. * @param[in] length Maximum number of data bytes to receive.
  330. */
  331. __STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
  332. uint8_t * p_buffer,
  333. size_t length);
  334. __STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
  335. uint32_t shorts_mask);
  336. __STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg);
  337. __STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg);
  338. /**
  339. * @brief Function for enabling the TX list feature.
  340. *
  341. * @param[in] p_reg Pointer to the peripheral registers structure.
  342. */
  343. __STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg);
  344. /**
  345. * @brief Function for disabling the TX list feature.
  346. *
  347. * @param[in] p_reg Pointer to the peripheral registers structure.
  348. */
  349. __STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg);
  350. /**
  351. * @brief Function for enabling the RX list feature.
  352. *
  353. * @param[in] p_reg Pointer to the peripheral registers structure.
  354. */
  355. __STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg);
  356. /**
  357. * @brief Function for disabling the RX list feature.
  358. *
  359. * @param[in] p_reg Pointer to the peripheral registers structure.
  360. */
  361. __STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg);
  362. #ifndef SUPPRESS_INLINE_IMPLEMENTATION
  363. __STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
  364. nrf_twim_task_t task)
  365. {
  366. *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
  367. }
  368. __STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,
  369. nrf_twim_task_t task)
  370. {
  371. return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task);
  372. }
  373. __STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
  374. nrf_twim_event_t event)
  375. {
  376. *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
  377. #if __CORTEX_M == 0x04
  378. volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
  379. (void)dummy;
  380. #endif
  381. }
  382. __STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
  383. nrf_twim_event_t event)
  384. {
  385. return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
  386. }
  387. __STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg,
  388. nrf_twim_event_t event)
  389. {
  390. return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
  391. }
  392. __STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
  393. uint32_t shorts_mask)
  394. {
  395. p_reg->SHORTS |= shorts_mask;
  396. }
  397. __STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
  398. uint32_t shorts_mask)
  399. {
  400. p_reg->SHORTS &= ~(shorts_mask);
  401. }
  402. __STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
  403. uint32_t int_mask)
  404. {
  405. p_reg->INTENSET = int_mask;
  406. }
  407. __STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
  408. uint32_t int_mask)
  409. {
  410. p_reg->INTENCLR = int_mask;
  411. }
  412. __STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
  413. nrf_twim_int_mask_t int_mask)
  414. {
  415. return (bool)(p_reg->INTENSET & int_mask);
  416. }
  417. #if defined(DPPI_PRESENT)
  418. __STATIC_INLINE void nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,
  419. nrf_twim_task_t task,
  420. uint8_t channel)
  421. {
  422. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
  423. ((uint32_t)channel | TWIM_SUBSCRIBE_STARTRX_EN_Msk);
  424. }
  425. __STATIC_INLINE void nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,
  426. nrf_twim_task_t task)
  427. {
  428. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
  429. }
  430. __STATIC_INLINE void nrf_twim_publish_set(NRF_TWIM_Type * p_reg,
  431. nrf_twim_event_t event,
  432. uint8_t channel)
  433. {
  434. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
  435. ((uint32_t)channel | TWIM_PUBLISH_STOPPED_EN_Msk);
  436. }
  437. __STATIC_INLINE void nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,
  438. nrf_twim_event_t event)
  439. {
  440. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
  441. }
  442. #endif // defined(DPPI_PRESENT)
  443. __STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg)
  444. {
  445. p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos);
  446. }
  447. __STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg)
  448. {
  449. p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos);
  450. }
  451. __STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
  452. uint32_t scl_pin,
  453. uint32_t sda_pin)
  454. {
  455. p_reg->PSEL.SCL = scl_pin;
  456. p_reg->PSEL.SDA = sda_pin;
  457. }
  458. __STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
  459. nrf_twim_frequency_t frequency)
  460. {
  461. p_reg->FREQUENCY = frequency;
  462. }
  463. __STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg)
  464. {
  465. uint32_t error_source = p_reg->ERRORSRC;
  466. // [error flags are cleared by writing '1' on their position]
  467. p_reg->ERRORSRC = error_source;
  468. return error_source;
  469. }
  470. __STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
  471. uint8_t address)
  472. {
  473. p_reg->ADDRESS = address;
  474. }
  475. __STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
  476. uint8_t const * p_buffer,
  477. size_t length)
  478. {
  479. p_reg->TXD.PTR = (uint32_t)p_buffer;
  480. p_reg->TXD.MAXCNT = length;
  481. }
  482. __STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
  483. uint8_t * p_buffer,
  484. size_t length)
  485. {
  486. p_reg->RXD.PTR = (uint32_t)p_buffer;
  487. p_reg->RXD.MAXCNT = length;
  488. }
  489. __STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
  490. uint32_t shorts_mask)
  491. {
  492. p_reg->SHORTS = shorts_mask;
  493. }
  494. __STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg)
  495. {
  496. return p_reg->TXD.AMOUNT;
  497. }
  498. __STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg)
  499. {
  500. return p_reg->RXD.AMOUNT;
  501. }
  502. __STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg)
  503. {
  504. p_reg->TXD.LIST = 1;
  505. }
  506. __STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg)
  507. {
  508. p_reg->TXD.LIST = 0;
  509. }
  510. __STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg)
  511. {
  512. p_reg->RXD.LIST = 1;
  513. }
  514. __STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg)
  515. {
  516. p_reg->RXD.LIST = 0;
  517. }
  518. #endif // SUPPRESS_INLINE_IMPLEMENTATION
  519. /** @} */
  520. #ifdef __cplusplus
  521. }
  522. #endif
  523. #endif // NRF_TWIM_H__