bf3005_regs.h 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337
  1. /*
  2. * This file is part of the OpenMV project.
  3. * Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
  4. * This work is licensed under the MIT license, see the file LICENSE for details.
  5. *
  6. * BF3005 register definitions.
  7. */
  8. #ifndef __REG_REGS_H__
  9. #define __REG_REGS_H__
  10. #if 0
  11. #define GAIN 0x00 /* AGC ¨C Gain control gain setting */
  12. #define BLUE 0x01 /* AWB ¨C Blue channel gain setting */
  13. #define RED 0x02 /* AWB ¨C Red channel gain setting */
  14. #define GREEN 0x03 /* AWB ¨C Green channel gain setting */
  15. #define BAVG 0x05 /* U/B Average Level */
  16. #define GAVG 0x06 /* Y/Gb Average Level */
  17. #define RAVG 0x07 /* V/R Average Level */
  18. #define AECH 0x08 /* Exposure Value ¨C AEC MSBs */
  19. #define COM2 0x09 /* Common Control 2 */
  20. #define COM2_SOFT_SLEEP 0x10 /* Soft sleep mode */
  21. #define COM2_OUT_DRIVE_1x 0x00 /* Output drive capability 1x */
  22. #define COM2_OUT_DRIVE_2x 0x01 /* Output drive capability 2x */
  23. #define COM2_OUT_DRIVE_3x 0x02 /* Output drive capability 3x */
  24. #define COM2_OUT_DRIVE_4x 0x03 /* Output drive capability 4x */
  25. #define REG_PID 0x0A /* Product ID Number MSB */
  26. #define REG_VER 0x0B /* Product ID Number LSB */
  27. #define COM3 0x0C /* Common Control 3 */
  28. #define COM3_VFLIP 0x80 /* Vertical flip image ON/OFF selection */
  29. #define COM3_MIRROR 0x40 /* Horizontal mirror image ON/OFF selection */
  30. #define COM3_SWAP_BR 0x20 /* Swap B/R output sequence in RGB output mode */
  31. #define COM3_SWAP_YUV 0x10 /* Swap Y/UV output sequence in YUV output mode */
  32. #define COM3_SWAP_MSB 0x08 /* Swap output MSB/LSB */
  33. #define COM3_TRI_CLOCK 0x04 /* Tri-state option for output clock at power-down period */
  34. #define COM3_TRI_DATA 0x02 /* Tri-state option for output data at power-down period */
  35. #define COM3_COLOR_BAR 0x01 /* Sensor color bar test pattern output enable */
  36. #define COM3_SET_CBAR(r, x) ((r&0xFE)|((x&1)<<0))
  37. #define COM3_SET_MIRROR(r, x) ((r&0xBF)|((x&1)<<6))
  38. #define COM3_SET_FLIP(r, x) ((r&0x7F)|((x&1)<<7))
  39. #define COM4 0x0D /* Common Control 4 */
  40. #define COM4_PLL_BYPASS 0x00 /* Bypass PLL */
  41. #define COM4_PLL_4x 0x40 /* PLL frequency 4x */
  42. #define COM4_PLL_6x 0x80 /* PLL frequency 6x */
  43. #define COM4_PLL_8x 0xc0 /* PLL frequency 8x */
  44. #define COM4_AEC_FULL 0x00 /* AEC evaluate full window */
  45. #define COM4_AEC_1_2 0x10 /* AEC evaluate 1/2 window */
  46. #define COM4_AEC_1_4 0x20 /* AEC evaluate 1/4 window */
  47. #define COM4_AEC_2_3 0x30 /* AEC evaluate 2/3 window */
  48. #define COM5 0x0E /* Common Control 5 */
  49. #define COM5_AFR 0x80 /* Auto frame rate control ON/OFF selection (night mode) */
  50. #define COM5_AFR_SPEED 0x40 /* Auto frame rate control speed selection */
  51. #define COM5_AFR_0 0x00 /* No reduction of frame rate */
  52. #define COM5_AFR_1_2 0x10 /* Max reduction to 1/2 frame rate */
  53. #define COM5_AFR_1_4 0x20 /* Max reduction to 1/4 frame rate */
  54. #define COM5_AFR_1_8 0x30 /* Max reduction to 1/8 frame rate */
  55. #define COM5_AFR_4x 0x04 /* Add frame when AGC reaches 4x gain */
  56. #define COM5_AFR_8x 0x08 /* Add frame when AGC reaches 8x gain */
  57. #define COM5_AFR_16x 0x0c /* Add frame when AGC reaches 16x gain */
  58. #define COM5_AEC_NO_LIMIT 0x01 /* No limit to AEC increase step */
  59. #define COM6 0x0F /* Common Control 6 */
  60. #define COM6_AUTO_WINDOW 0x01 /* Auto window setting ON/OFF selection when format changes */
  61. #define AEC 0x10 /* AEC[7:0] (see register AECH for AEC[15:8]) */
  62. #define CLKRC 0x11 /* Internal Clock */
  63. #define COM7 0x12 /* Common Control 7 */
  64. #define COM7_RESET 0x80 /* SCCB Register Reset */
  65. #define COM7_RES_VGA 0x00 /* Resolution VGA */
  66. #define COM7_RES_QVGA 0x40 /* Resolution QVGA */
  67. #define COM7_BT656 0x20 /* BT.656 protocol ON/OFF */
  68. #define COM7_SENSOR_RAW 0x10 /* Sensor RAW */
  69. #define COM7_FMT_GBR422 0x00 /* RGB output format GBR422 */
  70. #define COM7_FMT_RGB565 0x04 /* RGB output format RGB565 */
  71. #define COM7_FMT_RGB555 0x08 /* RGB output format RGB555 */
  72. #define COM7_FMT_RGB444 0x0C /* RGB output format RGB444 */
  73. #define COM7_FMT_YUV 0x00 /* Output format YUV */
  74. #define COM7_FMT_P_BAYER 0x01 /* Output format Processed Bayer RAW */
  75. #define COM7_FMT_RGB 0x02 /* Output format RGB */
  76. #define COM7_FMT_R_BAYER 0x03 /* Output format Bayer RAW */
  77. #define COM7_SET_FMT(r, x) ((r&0xFC)|((x&0x3)<<0))
  78. #define COM7_SET_RGB(r, x) ((r&0xF0)|(x&0x0C)|COM7_FMT_RGB)
  79. #define COM8 0x13 /* Common Control 8 */
  80. #define COM8_FAST_AUTO 0x80 /* Enable fast AGC/AEC algorithm */
  81. #define COM8_STEP_VSYNC 0x00 /* AEC - Step size limited to vertical blank */
  82. #define COM8_STEP_UNLIMIT 0x40 /* AEC - Step size unlimited step size */
  83. #define COM8_BANDF_EN 0x20 /* Banding filter ON/OFF */
  84. #define COM8_AEC_BANDF 0x10 /* Enable AEC below banding value */
  85. #define COM8_AEC_FINE_EN 0x08 /* Fine AEC ON/OFF control */
  86. #define COM8_AGC_EN 0x04 /* AGC Enable */
  87. #define COM8_AWB_EN 0x02 /* AWB Enable */
  88. #define COM8_AEC_EN 0x01 /* AEC Enable */
  89. #define COM8_SET_AGC(r, x) ((r&0xFB)|((x&0x1)<<2))
  90. #define COM8_SET_AWB(r, x) ((r&0xFD)|((x&0x1)<<1))
  91. #define COM8_SET_AEC(r, x) ((r&0xFE)|((x&0x1)<<0))
  92. #define COM9 0x14 /* Common Control 9 */
  93. #define COM9_HISTO_AVG 0x80 /* Histogram or average based AEC/AGC selection */
  94. #define COM9_AGC_GAIN_2x 0x00 /* Automatic Gain Ceiling 2x */
  95. #define COM9_AGC_GAIN_4x 0x10 /* Automatic Gain Ceiling 4x */
  96. #define COM9_AGC_GAIN_8x 0x20 /* Automatic Gain Ceiling 8x */
  97. #define COM9_AGC_GAIN_16x 0x30 /* Automatic Gain Ceiling 16x */
  98. #define COM9_AGC_GAIN_32x 0x40 /* Automatic Gain Ceiling 32x */
  99. #define COM9_DROP_VSYNC 0x04 /* Drop VSYNC output of corrupt frame */
  100. #define COM9_DROP_HREF 0x02 /* Drop HREF output of corrupt frame */
  101. #define COM9_SET_AGC(r, x) ((r&0x8F)|((x&0x07)<<4))
  102. #define COM10 0x15 /* Common Control 10 */
  103. #define COM10_NEGATIVE 0x80 /* Output negative data */
  104. #define COM10_HSYNC_EN 0x40 /* HREF changes to HSYNC */
  105. #define COM10_PCLK_FREE 0x00 /* PCLK output option: free running PCLK */
  106. #define COM10_PCLK_MASK 0x20 /* PCLK output option: masked during horizontal blank */
  107. #define COM10_PCLK_REV 0x10 /* PCLK reverse */
  108. #define COM10_HREF_REV 0x08 /* HREF reverse */
  109. #define COM10_VSYNC_FALLING 0x00 /* VSYNC changes on falling edge of PCLK */
  110. #define COM10_VSYNC_RISING 0x04 /* VSYNC changes on rising edge of PCLK */
  111. #define COM10_VSYNC_NEG 0x02 /* VSYNC negative */
  112. #define COM10_OUT_RANGE_8 0x01 /* Output data range: Full range */
  113. #define COM10_OUT_RANGE_10 0x00 /* Output data range: Data from [10] to [F0] (8 MSBs) */
  114. #define REG16 0x16 /* Register 16 */
  115. #define REG16_BIT_SHIFT 0x80 /* Bit shift test pattern options */
  116. #define HSTART 0x17 /* Horizontal Frame (HREF column) Start 8 MSBs (2 LSBs are at HREF[5:4]) */
  117. #define HSIZE 0x18 /* Horizontal Sensor Size (2 LSBs are at HREF[1:0]) */
  118. #define VSTART 0x19 /* Vertical Frame (row) Start 8 MSBs (1 LSB is at HREF[6]) */
  119. #define VSIZE 0x1A /* Vertical Sensor Size (1 LSB is at HREF[2]) */
  120. #define PSHFT 0x1B /* Data Format - Pixel Delay Select */
  121. #define REG_MIDH 0x1C /* Manufacturer ID Byte ¨C High */
  122. #define REG_MIDL 0x1D /* Manufacturer ID Byte ¨C Low */
  123. #define LAEC 0x1F /* Fine AEC Value - defines exposure value less than one row period */
  124. #define COM11 0x20 /* Common Control 11 */
  125. #define COM11_SNGL_FRAME_EN 0x02 /* Single frame ON/OFF selection */
  126. #define COM11_SNGL_XFR_TRIG 0x01 /* Single frame transfer trigger */
  127. #define BDBASE 0x22 /* Banding Filter Minimum AEC Value */
  128. #define DBSTEP 0x23 /* Banding Filter Maximum Step */
  129. #define AEW 0x24 /* AGC/AEC - Stable Operating Region (Upper Limit) */
  130. #define AEB 0x25 /* AGC/AEC - Stable Operating Region (Lower Limit) */
  131. #define VPT 0x26 /* AGC/AEC Fast Mode Operating Region */
  132. #define REG28 0x28 /* Selection on the number of dummy rows, N */
  133. #define HOUTSIZE 0x29 /* Horizontal Data Output Size MSBs (2 LSBs at register EXHCH[1:0]) */
  134. #define EXHCH 0x2A /* Dummy Pixel Insert MSB */
  135. #define EXHCL 0x2B /* Dummy Pixel Insert LSB */
  136. #define VOUTSIZE 0x2C /* Vertical Data Output Size MSBs (LSB at register EXHCH[2]) */
  137. #define ADVFL 0x2D /* LSB of Insert Dummy Rows in Vertical Sync (1 bit equals 1 row) */
  138. #define ADVFH 0x2E /* MSB of Insert Dummy Rows in Vertical Sync */
  139. #define YAVE 0x2F /* Y/G Channel Average Value */
  140. #define LUMHTH 0x30 /* Histogram AEC/AGC Luminance High Level Threshold */
  141. #define LUMLTH 0x31 /* Histogram AEC/AGC Luminance Low Level Threshold */
  142. #define HREF 0x32 /* Image Start and Size Control */
  143. #define DM_LNL 0x33 /* Dummy Row Low 8 Bits */
  144. #define DM_LNH 0x34 /* Dummy Row High 8 Bits */
  145. #define ADOFF_B 0x35 /* AD Offset Compensation Value for B Channel */
  146. #define ADOFF_R 0x36 /* AD Offset Compensation Value for R Channel */
  147. #define ADOFF_GB 0x37 /* AD Offset Compensation Value for GB Channel */
  148. #define ADOFF_GR 0x38 /* AD Offset Compensation Value for GR Channel */
  149. #define OFF_B 0x39 /* AD Offset Compensation Value for B Channel */
  150. #define OFF_R 0x3A /* AD Offset Compensation Value for R Channel */
  151. #define OFF_GB 0x3B /* AD Offset Compensation Value for GB Channel */
  152. #define OFF_GR 0x3C /* AD Offset Compensation Value for GR Channel */
  153. #define COM12 0x3D /* DC offset compensation for analog process */
  154. #define COM13 0x3E /* Common Control 13 */
  155. #define COM13_BLC_EN 0x80 /* BLC enable */
  156. #define COM13_ADC_EN 0x40 /* ADC channel BLC ON/OFF control */
  157. #define COM13_ANALOG_BLC 0x20 /* Analog processing channel BLC ON/OFF control */
  158. #define COM13_ABLC_GAIN_EN 0x04 /* ABLC gain trigger enable */
  159. #define COM14 0x3F /* Common Control 14 */
  160. #define COM15 0x40 /* Common Control 15 */
  161. #define COM16 0x41 /* Common Control 16 */
  162. #define TGT_B 0x42 /* BLC Blue Channel Target Value */
  163. #define TGT_R 0x43 /* BLC Red Channel Target Value */
  164. #define TGT_GB 0x44 /* BLC Gb Channel Target Value */
  165. #define TGT_GR 0x45 /* BLC Gr Channel Target Value */
  166. #define LC_CTR 0x46 /* Lens Correction Control */
  167. #define LC_CTR_RGB_COMP_1 0x00 /* R, G, and B channel compensation coefficient is set by LC_COEF (0x49) */
  168. #define LC_CTR_RGB_COMP_3 0x04 /* R, G, and B channel compensation coefficient is set by registers
  169. LC_COEFB (0x4B), LC_COEF (0x49), and LC_COEFR (0x4C), respectively */
  170. #define LC_CTR_EN 0x01 /* Lens correction enable */
  171. #define LC_XC 0x47 /* X Coordinate of Lens Correction Center Relative to Array Center */
  172. #define LC_YC 0x48 /* Y Coordinate of Lens Correction Center Relative to Array Center */
  173. #define LC_COEF 0x49 /* Lens Correction Coefficient */
  174. #define LC_RADI 0x4A /* Lens Correction Radius */
  175. #define LC_COEFB 0x4B /* Lens Correction B Channel Compensation Coefficient */
  176. #define LC_COEFR 0x4C /* Lens Correction R Channel Compensation Coefficient */
  177. #define FIXGAIN 0x4D /* Analog Fix Gain Amplifier */
  178. #define AREF0 0x4E /* Sensor Reference Control */
  179. #define AREF1 0x4F /* Sensor Reference Current Control */
  180. #define AREF2 0x50 /* Analog Reference Control */
  181. #define AREF3 0x51 /* ADC Reference Control */
  182. #define AREF4 0x52 /* ADC Reference Control */
  183. #define AREF5 0x53 /* ADC Reference Control */
  184. #define AREF6 0x54 /* Analog Reference Control */
  185. #define AREF7 0x55 /* Analog Reference Control */
  186. #define UFIX 0x60 /* U Channel Fixed Value Output */
  187. #define VFIX 0x61 /* V Channel Fixed Value Output */
  188. #define AWBB_BLK 0x62 /* AWB Option for Advanced AWB */
  189. #define AWB_CTRL0 0x63 /* AWB Control Byte 0 */
  190. #define AWB_CTRL0_GAIN_EN 0x80 /* AWB gain enable */
  191. #define AWB_CTRL0_CALC_EN 0x40 /* AWB calculate enable */
  192. #define AWB_CTRL0_WBC_MASK 0x0F /* WBC threshold 2 */
  193. #define DSP_CTRL1 0x64 /* DSP Control Byte 1 */
  194. #define DSP_CTRL1_FIFO_EN 0x80 /* FIFO enable/disable selection */
  195. #define DSP_CTRL1_UV_EN 0x40 /* UV adjust function ON/OFF selection */
  196. #define DSP_CTRL1_SDE_EN 0x20 /* SDE enable */
  197. #define DSP_CTRL1_MTRX_EN 0x10 /* Color matrix ON/OFF selection */
  198. #define DSP_CTRL1_INTRP_EN 0x08 /* Interpolation ON/OFF selection */
  199. #define DSP_CTRL1_GAMMA_EN 0x04 /* Gamma function ON/OFF selection */
  200. #define DSP_CTRL1_BLACK_EN 0x02 /* Black defect auto correction ON/OFF */
  201. #define DSP_CTRL1_WHITE_EN 0x01 /* White defect auto correction ON/OFF */
  202. #define DSP_CTRL2 0x65 /* DSP Control Byte 2 */
  203. #define DSP_CTRL2_VDCW_EN 0x08 /* Vertical DCW enable */
  204. #define DSP_CTRL2_HDCW_EN 0x04 /* Horizontal DCW enable */
  205. #define DSP_CTRL2_VZOOM_EN 0x02 /* Vertical zoom out enable */
  206. #define DSP_CTRL2_HZOOM_EN 0x01 /* Horizontal zoom out enable */
  207. #define DSP_CTRL3 0x66 /* DSP Control Byte 3 */
  208. #define DSP_CTRL3_UV_EN 0x80 /* UV output sequence option */
  209. #define DSP_CTRL3_CBAR_EN 0x20 /* DSP color bar ON/OFF selection */
  210. #define DSP_CTRL3_FIFO_EN 0x08 /* FIFO power down ON/OFF selection */
  211. #define DSP_CTRL3_SCAL1_PWDN 0x04 /* Scaling module power down control 1 */
  212. #define DSP_CTRL3_SCAL2_PWDN 0x02 /* Scaling module power down control 2 */
  213. #define DSP_CTRL3_INTRP_PWDN 0x01 /* Interpolation module power down control */
  214. #define DSP_CTRL3_SET_CBAR(r, x) ((r&0xDF)|((x&1)<<5))
  215. #define DSP_CTRL4 0x67 /* DSP Control Byte 4 */
  216. #define DSP_CTRL4_YUV_RGB 0x00 /* Output selection YUV or RGB */
  217. #define DSP_CTRL4_RAW8 0x02 /* Output selection RAW8 */
  218. #define DSP_CTRL4_RAW10 0x03 /* Output selection RAW10 */
  219. #define AWB_BIAS 0x68 /* AWB BLC Level Clip */
  220. #define AWB_CTRL1 0x69 /* AWB Control 1 */
  221. #define AWB_CTRL2 0x6A /* AWB Control 2 */
  222. #define AWB_CTRL3 0x6B /* AWB Control 3 */
  223. #define AWB_CTRL3_ADVANCED 0x80 /* AWB mode select - Advanced AWB */
  224. #define AWB_CTRL3_SIMPLE 0x00 /* AWB mode select - Simple AWB */
  225. #define AWB_CTRL4 0x6C /* AWB Control 4 */
  226. #define AWB_CTRL5 0x6D /* AWB Control 5 */
  227. #define AWB_CTRL6 0x6E /* AWB Control 6 */
  228. #define AWB_CTRL7 0x6F /* AWB Control 7 */
  229. #define AWB_CTRL8 0x70 /* AWB Control 8 */
  230. #define AWB_CTRL9 0x71 /* AWB Control 9 */
  231. #define AWB_CTRL10 0x72 /* AWB Control 10 */
  232. #define AWB_CTRL11 0x73 /* AWB Control 11 */
  233. #define AWB_CTRL12 0x74 /* AWB Control 12 */
  234. #define AWB_CTRL13 0x75 /* AWB Control 13 */
  235. #define AWB_CTRL14 0x76 /* AWB Control 14 */
  236. #define AWB_CTRL15 0x77 /* AWB Control 15 */
  237. #define AWB_CTRL16 0x78 /* AWB Control 16 */
  238. #define AWB_CTRL17 0x79 /* AWB Control 17 */
  239. #define AWB_CTRL18 0x7A /* AWB Control 18 */
  240. #define AWB_CTRL19 0x7B /* AWB Control 19 */
  241. #define AWB_CTRL20 0x7C /* AWB Control 20 */
  242. #define AWB_CTRL21 0x7D /* AWB Control 21 */
  243. #define GAM1 0x7E /* Gamma Curve 1st Segment Input End Point 0x04 Output Value */
  244. #define GAM2 0x7F /* Gamma Curve 2nd Segment Input End Point 0x08 Output Value */
  245. #define GAM3 0x80 /* Gamma Curve 3rd Segment Input End Point 0x10 Output Value */
  246. #define GAM4 0x81 /* Gamma Curve 4th Segment Input End Point 0x20 Output Value */
  247. #define GAM5 0x82 /* Gamma Curve 5th Segment Input End Point 0x28 Output Value */
  248. #define GAM6 0x83 /* Gamma Curve 6th Segment Input End Point 0x30 Output Value */
  249. #define GAM7 0x84 /* Gamma Curve 7th Segment Input End Point 0x38 Output Value */
  250. #define GAM8 0x85 /* Gamma Curve 8th Segment Input End Point 0x40 Output Value */
  251. #define GAM9 0x86 /* Gamma Curve 9th Segment Input End Point 0x48 Output Value */
  252. #define GAM10 0x87 /* Gamma Curve 10th Segment Input End Point 0x50 Output Value */
  253. #define GAM11 0x88 /* Gamma Curve 11th Segment Input End Point 0x60 Output Value */
  254. #define GAM12 0x89 /* Gamma Curve 12th Segment Input End Point 0x70 Output Value */
  255. #define GAM13 0x8A /* Gamma Curve 13th Segment Input End Point 0x90 Output Value */
  256. #define GAM14 0x8B /* Gamma Curve 14th Segment Input End Point 0xB0 Output Value */
  257. #define GAM15 0x8C /* Gamma Curve 15th Segment Input End Point 0xD0 Output Value */
  258. #define SLOP 0x8D /* Gamma Curve Highest Segment Slope */
  259. #define DNSTH 0x8E /* De-noise Threshold */
  260. #define EDGE0 0x8F /* Edge Enhancement Strength Control */
  261. #define EDGE1 0x90 /* Edge Enhancement Threshold Control */
  262. #define DNSOFF 0x91 /* Auto De-noise Threshold Control */
  263. #define EDGE2 0x92 /* Edge Enhancement Strength Upper Limit */
  264. #define EDGE3 0x93 /* Edge Enhancement Strength Upper Limit */
  265. #define MTX1 0x94 /* Matrix Coefficient 1 */
  266. #define MTX2 0x95 /* Matrix Coefficient 2 */
  267. #define MTX3 0x96 /* Matrix Coefficient 3 */
  268. #define MTX4 0x97 /* Matrix Coefficient 4 */
  269. #define MTX5 0x98 /* Matrix Coefficient 5 */
  270. #define MTX6 0x99 /* Matrix Coefficient 6 */
  271. #define MTX_CTRL 0x9A /* Matrix Control */
  272. #define MTX_CTRL_DBL_EN 0x80 /* Matrix double ON/OFF selection */
  273. #define BRIGHTNESS 0x9B /* Brightness Control */
  274. #define CONTRAST 0x9C /* Contrast Gain */
  275. #define UVADJ0 0x9E /* Auto UV Adjust Control 0 */
  276. #define UVADJ1 0x9F /* Auto UV Adjust Control 1 */
  277. #define SCAL0 0xA0 /* DCW Ratio Control */
  278. #define SCAL1 0xA1 /* Horizontal Zoom Out Control */
  279. #define SCAL2 0xA2 /* Vertical Zoom Out Control */
  280. #define FIFODLYM 0xA3 /* FIFO Manual Mode Delay Control */
  281. #define FIFODLYA 0xA4 /* FIFO Auto Mode Delay Control */
  282. #define SDE 0xA6 /* Special Digital Effect Control */
  283. #define SDE_NEGATIVE_EN 0x40 /* Negative image enable */
  284. #define SDE_GRAYSCALE_EN 0x20 /* Gray scale image enable */
  285. #define SDE_V_FIXED_EN 0x10 /* V fixed value enable */
  286. #define SDE_U_FIXED_EN 0x08 /* U fixed value enable */
  287. #define SDE_CONT_BRIGHT_EN 0x04 /* Contrast/Brightness enable */
  288. #define SDE_SATURATION_EN 0x02 /* Saturation enable */
  289. #define SDE_HUE_EN 0x01 /* Hue enable */
  290. #define USAT 0xA7 /* U Component Saturation Gain */
  291. #define VSAT 0xA8 /* V Component Saturation Gain */
  292. #define HUECOS 0xA9 /* Cosine value ¡Á 0x80 */
  293. #define HUESIN 0xAA /* Sine value ¡Á 0x80 */
  294. #define SIGN_BIT 0xAB /* Sign Bit for Hue and Brightness */
  295. #define DSPAUTO 0xAC /* DSP Auto Function ON/OFF Control */
  296. #define DSPAUTO_AWB_EN 0x80 /* AWB auto threshold control */
  297. #define DSPAUTO_DENOISE_EN 0x40 /* De-noise auto threshold control */
  298. #define DSPAUTO_EDGE_EN 0x20 /* Sharpness (edge enhancement) auto strength control */
  299. #define DSPAUTO_UV_EN 0x10 /* UV adjust auto slope control */
  300. #define DSPAUTO_SCAL0_EN 0x08 /* Auto scaling factor control (register SCAL0 (0xA0)) */
  301. #define DSPAUTO_SCAL1_EN 0x04 /* Auto scaling factor control (registers SCAL1 (0xA1 and SCAL2 (0xA2))*/
  302. #define SET_REG(reg, x) (##reg_DEFAULT|x)
  303. #endif //__REG_REGS_H__
  304. #endif