nrf5340_application_peripherals.h 7.6 KB

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  1. /*
  2. Copyright (c) 2010 - 2020, Nordic Semiconductor ASA
  3. All rights reserved.
  4. Redistribution and use in source and binary forms, with or without modification,
  5. are permitted provided that the following conditions are met:
  6. 1. Redistributions of source code must retain the above copyright notice, this
  7. list of conditions and the following disclaimer.
  8. 2. Redistributions in binary form, except as embedded into a Nordic
  9. Semiconductor ASA integrated circuit in a product or a software update for
  10. such product, must reproduce the above copyright notice, this list of
  11. conditions and the following disclaimer in the documentation and/or other
  12. materials provided with the distribution.
  13. 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  14. contributors may be used to endorse or promote products derived from this
  15. software without specific prior written permission.
  16. 4. This software, with or without modification, must only be used with a
  17. Nordic Semiconductor ASA integrated circuit.
  18. 5. Any software provided in binary form under this license must not be reverse
  19. engineered, decompiled, modified and/or disassembled.
  20. THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  21. OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22. OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  23. DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  24. LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25. CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  26. GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  27. HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  28. LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  29. OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30. */
  31. #ifndef _NRF5340_PERIPHERALS_H
  32. #define _NRF5340_PERIPHERALS_H
  33. /* Clock Peripheral */
  34. #define CLOCK_PRESENT
  35. #define CLOCK_COUNT 1
  36. /* Power Peripheral */
  37. #define POWER_PRESENT
  38. #define POWER_COUNT 1
  39. /* Non-Volatile Memory Controller */
  40. #define NVMC_PRESENT
  41. #define NVMC_COUNT 1
  42. /* NVM instruction and data cache */
  43. #define CACHE_PRESENT
  44. #define CACHE_COUNT 1
  45. /* Memory Protection Unit */
  46. #define MPU_REGION_NUM 8
  47. /* Regulators Peripheral */
  48. #define REGULATORS_PRESENT
  49. #define REGULATORS_COUNT 1
  50. #define REGULATORS_FEATURE_VDDH_PRESENT
  51. /* USB Regulator Peripheral */
  52. #define USBREG_PRESENT
  53. #define USBREG_COUNT 1
  54. /* Volatile Memory Controller Peripheral */
  55. #define VMC_PRESENT
  56. #define VMC_COUNT 1
  57. #define VMC_FEATURE_RAM_REGISTERS_PRESENT
  58. #define VMC_FEATURE_RAM_REGISTERS_COUNT 8
  59. /* Floating Point Unit */
  60. #define FPU_PRESENT
  61. #define FPU_COUNT 1
  62. /* Systick timer */
  63. #define SYSTICK_PRESENT
  64. #define SYSTICK_COUNT 1
  65. /* Inter-Processor Communication */
  66. #define IPC_PRESENT
  67. #define IPC_COUNT 1
  68. #define IPC_CH_NUM 16
  69. #define IPC_CONF_NUM 16
  70. #define IPC_GPMEM_NUM 2
  71. /* GPIO */
  72. #define GPIO_PRESENT
  73. #define GPIO_COUNT 2
  74. #define P0_PIN_NUM 32
  75. #define P1_PIN_NUM 16
  76. #define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
  77. #define P1_FEATURE_PINS_PRESENT 0x0000FFFFUL
  78. /* NFC Tag */
  79. #define NFCT_PRESENT
  80. #define NFCT_COUNT 1
  81. #define NFCT_EASYDMA_MAXCNT_SIZE 9
  82. /* Distributed Peripheral to Peripheral Interconnect */
  83. #define DPPI_PRESENT
  84. #define DPPI_COUNT 1
  85. #define DPPI_CH_NUM 32
  86. #define DPPI_GROUP_NUM 6
  87. /* Event Generator Unit */
  88. #define EGU_PRESENT
  89. #define EGU_COUNT 6
  90. #define EGU0_CH_NUM 16
  91. #define EGU1_CH_NUM 16
  92. #define EGU2_CH_NUM 16
  93. #define EGU3_CH_NUM 16
  94. #define EGU4_CH_NUM 16
  95. #define EGU5_CH_NUM 16
  96. /* Timer/Counter */
  97. #define TIMER_PRESENT
  98. #define TIMER_COUNT 3
  99. #define TIMER0_MAX_SIZE 32
  100. #define TIMER1_MAX_SIZE 32
  101. #define TIMER2_MAX_SIZE 32
  102. #define TIMER0_CC_NUM 6
  103. #define TIMER1_CC_NUM 6
  104. #define TIMER2_CC_NUM 6
  105. /* Real Time Counter */
  106. #define RTC_PRESENT
  107. #define RTC_COUNT 2
  108. #define RTC0_CC_NUM 4
  109. #define RTC1_CC_NUM 4
  110. /* Watchdog Timer */
  111. #define WDT_PRESENT
  112. #define WDT_COUNT 2
  113. /* Serial Peripheral Interface Master with DMA */
  114. #define SPIM_PRESENT
  115. #define SPIM_COUNT 5
  116. #define SPIM0_MAX_DATARATE 8
  117. #define SPIM1_MAX_DATARATE 8
  118. #define SPIM2_MAX_DATARATE 8
  119. #define SPIM3_MAX_DATARATE 8
  120. #define SPIM4_MAX_DATARATE 32
  121. #define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
  122. #define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
  123. #define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
  124. #define SPIM3_FEATURE_HARDWARE_CSN_PRESENT 0
  125. #define SPIM4_FEATURE_HARDWARE_CSN_PRESENT 1
  126. #define SPIM0_FEATURE_DCX_PRESENT 0
  127. #define SPIM1_FEATURE_DCX_PRESENT 0
  128. #define SPIM2_FEATURE_DCX_PRESENT 0
  129. #define SPIM3_FEATURE_DCX_PRESENT 0
  130. #define SPIM4_FEATURE_DCX_PRESENT 1
  131. #define SPIM0_FEATURE_RXDELAY_PRESENT 0
  132. #define SPIM1_FEATURE_RXDELAY_PRESENT 0
  133. #define SPIM2_FEATURE_RXDELAY_PRESENT 0
  134. #define SPIM3_FEATURE_RXDELAY_PRESENT 0
  135. #define SPIM4_FEATURE_RXDELAY_PRESENT 1
  136. #define SPIM0_EASYDMA_MAXCNT_SIZE 16
  137. #define SPIM1_EASYDMA_MAXCNT_SIZE 16
  138. #define SPIM2_EASYDMA_MAXCNT_SIZE 16
  139. #define SPIM3_EASYDMA_MAXCNT_SIZE 16
  140. #define SPIM4_EASYDMA_MAXCNT_SIZE 16
  141. /* Serial Peripheral Interface Slave with DMA*/
  142. #define SPIS_PRESENT
  143. #define SPIS_COUNT 4
  144. #define SPIS0_EASYDMA_MAXCNT_SIZE 16
  145. #define SPIS1_EASYDMA_MAXCNT_SIZE 16
  146. #define SPIS2_EASYDMA_MAXCNT_SIZE 16
  147. #define SPIS3_EASYDMA_MAXCNT_SIZE 16
  148. /* Two Wire Interface Master with DMA */
  149. #define TWIM_PRESENT
  150. #define TWIM_COUNT 4
  151. #define TWIM0_EASYDMA_MAXCNT_SIZE 16
  152. #define TWIM1_EASYDMA_MAXCNT_SIZE 16
  153. #define TWIM2_EASYDMA_MAXCNT_SIZE 16
  154. #define TWIM3_EASYDMA_MAXCNT_SIZE 16
  155. /* Two Wire Interface Slave with DMA */
  156. #define TWIS_PRESENT
  157. #define TWIS_COUNT 4
  158. #define TWIS0_EASYDMA_MAXCNT_SIZE 16
  159. #define TWIS1_EASYDMA_MAXCNT_SIZE 16
  160. #define TWIS2_EASYDMA_MAXCNT_SIZE 16
  161. #define TWIS3_EASYDMA_MAXCNT_SIZE 16
  162. /* Universal Asynchronous Receiver-Transmitter with DMA */
  163. #define UARTE_PRESENT
  164. #define UARTE_COUNT 4
  165. #define UARTE0_EASYDMA_MAXCNT_SIZE 16
  166. #define UARTE1_EASYDMA_MAXCNT_SIZE 16
  167. #define UARTE2_EASYDMA_MAXCNT_SIZE 16
  168. #define UARTE3_EASYDMA_MAXCNT_SIZE 16
  169. /* Quadrature Decoder */
  170. #define QDEC_PRESENT
  171. #define QDEC_COUNT 2
  172. /* Successive Approximation Analog to Digital Converter */
  173. #define SAADC_PRESENT
  174. #define SAADC_COUNT 1
  175. #define SAADC_CH_NUM 8
  176. #define SAADC_EASYDMA_MAXCNT_SIZE 15
  177. /* GPIO Tasks and Events */
  178. #define GPIOTE_PRESENT
  179. #define GPIOTE_COUNT 2
  180. #define GPIOTE_CH_NUM 8
  181. #define GPIOTE_FEATURE_SET_PRESENT
  182. #define GPIOTE_FEATURE_CLR_PRESENT
  183. /* Low Power Comparator */
  184. #define LPCOMP_PRESENT
  185. #define LPCOMP_COUNT 1
  186. #define LPCOMP_REFSEL_RESOLUTION 16
  187. #define LPCOMP_FEATURE_HYST_PRESENT
  188. /* Comparator */
  189. #define COMP_PRESENT
  190. #define COMP_COUNT 1
  191. /* Pulse Width Modulator */
  192. #define PWM_PRESENT
  193. #define PWM_COUNT 4
  194. #define PWM0_CH_NUM 4
  195. #define PWM1_CH_NUM 4
  196. #define PWM2_CH_NUM 4
  197. #define PWM3_CH_NUM 4
  198. #define PWM0_EASYDMA_MAXCNT_SIZE 15
  199. #define PWM1_EASYDMA_MAXCNT_SIZE 15
  200. #define PWM2_EASYDMA_MAXCNT_SIZE 15
  201. #define PWM3_EASYDMA_MAXCNT_SIZE 15
  202. /* ARM TrustZone Cryptocell 310 */
  203. #define CRYPTOCELL_PRESENT
  204. #define CRYPTOCELL_COUNT 1
  205. /* Quad SPI */
  206. #define QSPI_PRESENT
  207. #define QSPI_COUNT 1
  208. #define QSPI_EASYDMA_MAXCNT_SIZE 20
  209. /* Mutex*/
  210. #define MUTEX_PRESENT
  211. #define MUTEX_COUNT 1
  212. /* Key management Unit */
  213. #define KMU_PRESENT
  214. #define KMU_COUNT 1
  215. /* Pulse density modulation */
  216. #define PDM_PRESENT
  217. #define PDM_COUNT 1
  218. /* Secure Peripheral Unit */
  219. #define SPU_PRESENT
  220. #define SPU_COUNT 1
  221. /* Inter-IC Sound Interface */
  222. #define I2S_PRESENT
  223. #define I2S_COUNT 1
  224. #define I2S_EASYDMA_MAXCNT_SIZE 14
  225. /* Universal Serial Bus Device */
  226. #define USBD_PRESENT
  227. #define USBD_COUNT 1
  228. #define USBD_EASYDMA_MAXCNT_SIZE 7
  229. /* Oscillators */
  230. #define OSCILLATORS_PRESENT
  231. #define OSCILLATORS_COUNT 1
  232. #endif // _NRF5340_PERIPHERALS_H