gcc_startup_nrf51.S 7.6 KB

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  1. /*
  2. Copyright (c) 2009-2020 ARM Limited. All rights reserved.
  3. SPDX-License-Identifier: Apache-2.0
  4. Licensed under the Apache License, Version 2.0 (the License); you may
  5. not use this file except in compliance with the License.
  6. You may obtain a copy of the License at
  7. www.apache.org/licenses/LICENSE-2.0
  8. Unless required by applicable law or agreed to in writing, software
  9. distributed under the License is distributed on an AS IS BASIS, WITHOUT
  10. WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. See the License for the specific language governing permissions and
  12. limitations under the License.
  13. NOTICE: This file has been modified by Nordic Semiconductor ASA.
  14. */
  15. .syntax unified
  16. .arch armv6-m
  17. #ifdef __STARTUP_CONFIG
  18. #include "startup_config.h"
  19. #ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
  20. #define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
  21. #endif
  22. #endif
  23. .section .stack
  24. #if defined(__STARTUP_CONFIG)
  25. .align __STARTUP_CONFIG_STACK_ALIGNEMENT
  26. .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE
  27. #elif defined(__STACK_SIZE)
  28. .align 3
  29. .equ Stack_Size, __STACK_SIZE
  30. #else
  31. .align 3
  32. .equ Stack_Size, 2048
  33. #endif
  34. .globl __StackTop
  35. .globl __StackLimit
  36. __StackLimit:
  37. .space Stack_Size
  38. .size __StackLimit, . - __StackLimit
  39. __StackTop:
  40. .size __StackTop, . - __StackTop
  41. .section .heap
  42. .align 3
  43. #if defined(__STARTUP_CONFIG)
  44. .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
  45. #elif defined(__HEAP_SIZE)
  46. .equ Heap_Size, __HEAP_SIZE
  47. #else
  48. .equ Heap_Size, 2048
  49. #endif
  50. .globl __HeapBase
  51. .globl __HeapLimit
  52. __HeapBase:
  53. .if Heap_Size
  54. .space Heap_Size
  55. .endif
  56. .size __HeapBase, . - __HeapBase
  57. __HeapLimit:
  58. .size __HeapLimit, . - __HeapLimit
  59. .section .isr_vector, "ax"
  60. .align 2
  61. .globl __isr_vector
  62. __isr_vector:
  63. .long __StackTop /* Top of Stack */
  64. .long Reset_Handler
  65. .long NMI_Handler
  66. .long HardFault_Handler
  67. .long 0 /*Reserved */
  68. .long 0 /*Reserved */
  69. .long 0 /*Reserved */
  70. .long 0 /*Reserved */
  71. .long 0 /*Reserved */
  72. .long 0 /*Reserved */
  73. .long 0 /*Reserved */
  74. .long SVC_Handler
  75. .long 0 /*Reserved */
  76. .long 0 /*Reserved */
  77. .long PendSV_Handler
  78. .long SysTick_Handler
  79. /* External Interrupts */
  80. .long POWER_CLOCK_IRQHandler
  81. .long RADIO_IRQHandler
  82. .long UART0_IRQHandler
  83. .long SPI0_TWI0_IRQHandler
  84. .long SPI1_TWI1_IRQHandler
  85. .long 0 /*Reserved */
  86. .long GPIOTE_IRQHandler
  87. .long ADC_IRQHandler
  88. .long TIMER0_IRQHandler
  89. .long TIMER1_IRQHandler
  90. .long TIMER2_IRQHandler
  91. .long RTC0_IRQHandler
  92. .long TEMP_IRQHandler
  93. .long RNG_IRQHandler
  94. .long ECB_IRQHandler
  95. .long CCM_AAR_IRQHandler
  96. .long WDT_IRQHandler
  97. .long RTC1_IRQHandler
  98. .long QDEC_IRQHandler
  99. .long LPCOMP_IRQHandler
  100. .long SWI0_IRQHandler
  101. .long SWI1_IRQHandler
  102. .long SWI2_IRQHandler
  103. .long SWI3_IRQHandler
  104. .long SWI4_IRQHandler
  105. .long SWI5_IRQHandler
  106. .long 0 /*Reserved */
  107. .long 0 /*Reserved */
  108. .long 0 /*Reserved */
  109. .long 0 /*Reserved */
  110. .long 0 /*Reserved */
  111. .long 0 /*Reserved */
  112. .size __isr_vector, . - __isr_vector
  113. /* Reset Handler */
  114. .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
  115. .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
  116. .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
  117. .text
  118. .thumb
  119. .thumb_func
  120. .align 1
  121. .globl Reset_Handler
  122. .type Reset_Handler, %function
  123. Reset_Handler:
  124. MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
  125. LDR R0, =NRF_POWER_RAMON_ADDRESS
  126. LDR R2, [R0]
  127. ORRS R2, R1
  128. STR R2, [R0]
  129. LDR R0, =NRF_POWER_RAMONB_ADDRESS
  130. LDR R2, [R0]
  131. ORRS R2, R1
  132. STR R2, [R0]
  133. /* Loop to copy data from read only memory to RAM.
  134. * The ranges of copy from/to are specified by following symbols:
  135. * __etext: LMA of start of the section to copy from. Usually end of text
  136. * __data_start__: VMA of start of the section to copy to.
  137. * __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
  138. * the user can add their own initialized data section before BSS section with the INSERT AFTER command.
  139. *
  140. * All addresses must be aligned to 4 bytes boundary.
  141. */
  142. #ifndef __STARTUP_SKIP_ETEXT
  143. ldr r1, =__etext
  144. ldr r2, =__data_start__
  145. ldr r3, =__bss_start__
  146. subs r3, r3, r2
  147. ble .L_loop1_done
  148. .L_loop1:
  149. subs r3, r3, #4
  150. ldr r0, [r1,r3]
  151. str r0, [r2,r3]
  152. bgt .L_loop1
  153. .L_loop1_done:
  154. #endif
  155. /* This part of work usually is done in C library startup code. Otherwise,
  156. * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
  157. * clears the RAM where BSS data is located.
  158. *
  159. * The BSS section is specified by following symbols
  160. * __bss_start__: start of the BSS section.
  161. * __bss_end__: end of the BSS section.
  162. *
  163. * All addresses must be aligned to 4 bytes boundary.
  164. */
  165. #ifdef __STARTUP_CLEAR_BSS
  166. ldr r1, =__bss_start__
  167. ldr r2, =__bss_end__
  168. movs r0, 0
  169. subs r2, r2, r1
  170. ble .L_loop3_done
  171. .L_loop3:
  172. subs r2, r2, #4
  173. str r0, [r1, r2]
  174. bgt .L_loop3
  175. .L_loop3_done:
  176. #endif /* __STARTUP_CLEAR_BSS */
  177. /* Execute SystemInit function. */
  178. bl SystemInit
  179. /* Call _start function provided by libraries.
  180. * If those libraries are not accessible, define __START as your entry point.
  181. */
  182. #ifndef __START
  183. #define __START _start
  184. #endif
  185. bl __START
  186. .pool
  187. .size Reset_Handler,.-Reset_Handler
  188. .section ".text"
  189. /* Dummy Exception Handlers (infinite loops which can be modified) */
  190. .weak NMI_Handler
  191. .type NMI_Handler, %function
  192. NMI_Handler:
  193. b .
  194. .size NMI_Handler, . - NMI_Handler
  195. .weak HardFault_Handler
  196. .type HardFault_Handler, %function
  197. HardFault_Handler:
  198. b .
  199. .size HardFault_Handler, . - HardFault_Handler
  200. .weak SVC_Handler
  201. .type SVC_Handler, %function
  202. SVC_Handler:
  203. b .
  204. .size SVC_Handler, . - SVC_Handler
  205. .weak PendSV_Handler
  206. .type PendSV_Handler, %function
  207. PendSV_Handler:
  208. b .
  209. .size PendSV_Handler, . - PendSV_Handler
  210. .weak SysTick_Handler
  211. .type SysTick_Handler, %function
  212. SysTick_Handler:
  213. b .
  214. .size SysTick_Handler, . - SysTick_Handler
  215. /* IRQ Handlers */
  216. .globl Default_Handler
  217. .type Default_Handler, %function
  218. Default_Handler:
  219. b .
  220. .size Default_Handler, . - Default_Handler
  221. .macro IRQ handler
  222. .weak \handler
  223. .set \handler, Default_Handler
  224. .endm
  225. IRQ POWER_CLOCK_IRQHandler
  226. IRQ RADIO_IRQHandler
  227. IRQ UART0_IRQHandler
  228. IRQ SPI0_TWI0_IRQHandler
  229. IRQ SPI1_TWI1_IRQHandler
  230. IRQ GPIOTE_IRQHandler
  231. IRQ ADC_IRQHandler
  232. IRQ TIMER0_IRQHandler
  233. IRQ TIMER1_IRQHandler
  234. IRQ TIMER2_IRQHandler
  235. IRQ RTC0_IRQHandler
  236. IRQ TEMP_IRQHandler
  237. IRQ RNG_IRQHandler
  238. IRQ ECB_IRQHandler
  239. IRQ CCM_AAR_IRQHandler
  240. IRQ WDT_IRQHandler
  241. IRQ RTC1_IRQHandler
  242. IRQ QDEC_IRQHandler
  243. IRQ LPCOMP_IRQHandler
  244. IRQ SWI0_IRQHandler
  245. IRQ SWI1_IRQHandler
  246. IRQ SWI2_IRQHandler
  247. IRQ SWI3_IRQHandler
  248. IRQ SWI4_IRQHandler
  249. IRQ SWI5_IRQHandler
  250. .end