arm_startup_nrf52.s 14 KB

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  1. ; Copyright (c) 2009-2020 ARM Limited. All rights reserved.
  2. ;
  3. ; SPDX-License-Identifier: Apache-2.0
  4. ;
  5. ; Licensed under the Apache License, Version 2.0 (the License); you may
  6. ; not use this file except in compliance with the License.
  7. ; You may obtain a copy of the License at
  8. ;
  9. ; www.apache.org/licenses/LICENSE-2.0
  10. ;
  11. ; Unless required by applicable law or agreed to in writing, software
  12. ; distributed under the License is distributed on an AS IS BASIS, WITHOUT
  13. ; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  14. ; See the License for the specific language governing permissions and
  15. ; limitations under the License.
  16. ;
  17. ; NOTICE: This file has been modified by Nordic Semiconductor ASA.
  18. IF :DEF: __STARTUP_CONFIG
  19. #ifdef __STARTUP_CONFIG
  20. #include "startup_config.h"
  21. #ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
  22. #define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
  23. #endif
  24. #endif
  25. ENDIF
  26. IF :DEF: __STARTUP_CONFIG
  27. Stack_Size EQU __STARTUP_CONFIG_STACK_SIZE
  28. ELIF :DEF: __STACK_SIZE
  29. Stack_Size EQU __STACK_SIZE
  30. ELSE
  31. Stack_Size EQU 4096
  32. ENDIF
  33. IF :DEF: __STARTUP_CONFIG
  34. Stack_Align EQU __STARTUP_CONFIG_STACK_ALIGNEMENT
  35. ELSE
  36. Stack_Align EQU 3
  37. ENDIF
  38. AREA STACK, NOINIT, READWRITE, ALIGN=Stack_Align
  39. Stack_Mem SPACE Stack_Size
  40. __initial_sp
  41. IF :DEF: __STARTUP_CONFIG
  42. Heap_Size EQU __STARTUP_CONFIG_HEAP_SIZE
  43. ELIF :DEF: __HEAP_SIZE
  44. Heap_Size EQU __HEAP_SIZE
  45. ELSE
  46. Heap_Size EQU 4096
  47. ENDIF
  48. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  49. __heap_base
  50. Heap_Mem SPACE Heap_Size
  51. __heap_limit
  52. PRESERVE8
  53. THUMB
  54. ; Vector Table Mapped to Address 0 at Reset
  55. AREA RESET, DATA, READONLY
  56. EXPORT __Vectors
  57. EXPORT __Vectors_End
  58. EXPORT __Vectors_Size
  59. __Vectors DCD __initial_sp ; Top of Stack
  60. DCD Reset_Handler
  61. DCD NMI_Handler
  62. DCD HardFault_Handler
  63. DCD MemoryManagement_Handler
  64. DCD BusFault_Handler
  65. DCD UsageFault_Handler
  66. DCD 0 ; Reserved
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD 0 ; Reserved
  70. DCD SVC_Handler
  71. DCD DebugMon_Handler
  72. DCD 0 ; Reserved
  73. DCD PendSV_Handler
  74. DCD SysTick_Handler
  75. ; External Interrupts
  76. DCD POWER_CLOCK_IRQHandler
  77. DCD RADIO_IRQHandler
  78. DCD UARTE0_UART0_IRQHandler
  79. DCD SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
  80. DCD SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
  81. DCD NFCT_IRQHandler
  82. DCD GPIOTE_IRQHandler
  83. DCD SAADC_IRQHandler
  84. DCD TIMER0_IRQHandler
  85. DCD TIMER1_IRQHandler
  86. DCD TIMER2_IRQHandler
  87. DCD RTC0_IRQHandler
  88. DCD TEMP_IRQHandler
  89. DCD RNG_IRQHandler
  90. DCD ECB_IRQHandler
  91. DCD CCM_AAR_IRQHandler
  92. DCD WDT_IRQHandler
  93. DCD RTC1_IRQHandler
  94. DCD QDEC_IRQHandler
  95. DCD COMP_LPCOMP_IRQHandler
  96. DCD SWI0_EGU0_IRQHandler
  97. DCD SWI1_EGU1_IRQHandler
  98. DCD SWI2_EGU2_IRQHandler
  99. DCD SWI3_EGU3_IRQHandler
  100. DCD SWI4_EGU4_IRQHandler
  101. DCD SWI5_EGU5_IRQHandler
  102. DCD TIMER3_IRQHandler
  103. DCD TIMER4_IRQHandler
  104. DCD PWM0_IRQHandler
  105. DCD PDM_IRQHandler
  106. DCD 0 ; Reserved
  107. DCD 0 ; Reserved
  108. DCD MWU_IRQHandler
  109. DCD PWM1_IRQHandler
  110. DCD PWM2_IRQHandler
  111. DCD SPIM2_SPIS2_SPI2_IRQHandler
  112. DCD RTC2_IRQHandler
  113. DCD I2S_IRQHandler
  114. DCD FPU_IRQHandler
  115. DCD 0 ; Reserved
  116. DCD 0 ; Reserved
  117. DCD 0 ; Reserved
  118. DCD 0 ; Reserved
  119. DCD 0 ; Reserved
  120. DCD 0 ; Reserved
  121. DCD 0 ; Reserved
  122. DCD 0 ; Reserved
  123. DCD 0 ; Reserved
  124. DCD 0 ; Reserved
  125. DCD 0 ; Reserved
  126. DCD 0 ; Reserved
  127. DCD 0 ; Reserved
  128. DCD 0 ; Reserved
  129. DCD 0 ; Reserved
  130. DCD 0 ; Reserved
  131. DCD 0 ; Reserved
  132. DCD 0 ; Reserved
  133. DCD 0 ; Reserved
  134. DCD 0 ; Reserved
  135. DCD 0 ; Reserved
  136. DCD 0 ; Reserved
  137. DCD 0 ; Reserved
  138. DCD 0 ; Reserved
  139. DCD 0 ; Reserved
  140. DCD 0 ; Reserved
  141. DCD 0 ; Reserved
  142. DCD 0 ; Reserved
  143. DCD 0 ; Reserved
  144. DCD 0 ; Reserved
  145. DCD 0 ; Reserved
  146. DCD 0 ; Reserved
  147. DCD 0 ; Reserved
  148. DCD 0 ; Reserved
  149. DCD 0 ; Reserved
  150. DCD 0 ; Reserved
  151. DCD 0 ; Reserved
  152. DCD 0 ; Reserved
  153. DCD 0 ; Reserved
  154. DCD 0 ; Reserved
  155. DCD 0 ; Reserved
  156. DCD 0 ; Reserved
  157. DCD 0 ; Reserved
  158. DCD 0 ; Reserved
  159. DCD 0 ; Reserved
  160. DCD 0 ; Reserved
  161. DCD 0 ; Reserved
  162. DCD 0 ; Reserved
  163. DCD 0 ; Reserved
  164. DCD 0 ; Reserved
  165. DCD 0 ; Reserved
  166. DCD 0 ; Reserved
  167. DCD 0 ; Reserved
  168. DCD 0 ; Reserved
  169. DCD 0 ; Reserved
  170. DCD 0 ; Reserved
  171. DCD 0 ; Reserved
  172. DCD 0 ; Reserved
  173. DCD 0 ; Reserved
  174. DCD 0 ; Reserved
  175. DCD 0 ; Reserved
  176. DCD 0 ; Reserved
  177. DCD 0 ; Reserved
  178. DCD 0 ; Reserved
  179. DCD 0 ; Reserved
  180. DCD 0 ; Reserved
  181. DCD 0 ; Reserved
  182. DCD 0 ; Reserved
  183. DCD 0 ; Reserved
  184. DCD 0 ; Reserved
  185. DCD 0 ; Reserved
  186. DCD 0 ; Reserved
  187. DCD 0 ; Reserved
  188. __Vectors_End
  189. __Vectors_Size EQU __Vectors_End - __Vectors
  190. AREA |.text|, CODE, READONLY
  191. ; Reset Handler
  192. Reset_Handler PROC
  193. EXPORT Reset_Handler [WEAK]
  194. IMPORT SystemInit
  195. IMPORT __main
  196. LDR R0, =SystemInit
  197. BLX R0
  198. LDR R0, =__main
  199. BX R0
  200. ENDP
  201. ; Dummy Exception Handlers (infinite loops which can be modified)
  202. NMI_Handler PROC
  203. EXPORT NMI_Handler [WEAK]
  204. B .
  205. ENDP
  206. HardFault_Handler\
  207. PROC
  208. EXPORT HardFault_Handler [WEAK]
  209. B .
  210. ENDP
  211. MemoryManagement_Handler\
  212. PROC
  213. EXPORT MemoryManagement_Handler [WEAK]
  214. B .
  215. ENDP
  216. BusFault_Handler\
  217. PROC
  218. EXPORT BusFault_Handler [WEAK]
  219. B .
  220. ENDP
  221. UsageFault_Handler\
  222. PROC
  223. EXPORT UsageFault_Handler [WEAK]
  224. B .
  225. ENDP
  226. SVC_Handler PROC
  227. EXPORT SVC_Handler [WEAK]
  228. B .
  229. ENDP
  230. DebugMon_Handler\
  231. PROC
  232. EXPORT DebugMon_Handler [WEAK]
  233. B .
  234. ENDP
  235. PendSV_Handler PROC
  236. EXPORT PendSV_Handler [WEAK]
  237. B .
  238. ENDP
  239. SysTick_Handler PROC
  240. EXPORT SysTick_Handler [WEAK]
  241. B .
  242. ENDP
  243. Default_Handler PROC
  244. EXPORT POWER_CLOCK_IRQHandler [WEAK]
  245. EXPORT RADIO_IRQHandler [WEAK]
  246. EXPORT UARTE0_UART0_IRQHandler [WEAK]
  247. EXPORT SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler [WEAK]
  248. EXPORT SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler [WEAK]
  249. EXPORT NFCT_IRQHandler [WEAK]
  250. EXPORT GPIOTE_IRQHandler [WEAK]
  251. EXPORT SAADC_IRQHandler [WEAK]
  252. EXPORT TIMER0_IRQHandler [WEAK]
  253. EXPORT TIMER1_IRQHandler [WEAK]
  254. EXPORT TIMER2_IRQHandler [WEAK]
  255. EXPORT RTC0_IRQHandler [WEAK]
  256. EXPORT TEMP_IRQHandler [WEAK]
  257. EXPORT RNG_IRQHandler [WEAK]
  258. EXPORT ECB_IRQHandler [WEAK]
  259. EXPORT CCM_AAR_IRQHandler [WEAK]
  260. EXPORT WDT_IRQHandler [WEAK]
  261. EXPORT RTC1_IRQHandler [WEAK]
  262. EXPORT QDEC_IRQHandler [WEAK]
  263. EXPORT COMP_LPCOMP_IRQHandler [WEAK]
  264. EXPORT SWI0_EGU0_IRQHandler [WEAK]
  265. EXPORT SWI1_EGU1_IRQHandler [WEAK]
  266. EXPORT SWI2_EGU2_IRQHandler [WEAK]
  267. EXPORT SWI3_EGU3_IRQHandler [WEAK]
  268. EXPORT SWI4_EGU4_IRQHandler [WEAK]
  269. EXPORT SWI5_EGU5_IRQHandler [WEAK]
  270. EXPORT TIMER3_IRQHandler [WEAK]
  271. EXPORT TIMER4_IRQHandler [WEAK]
  272. EXPORT PWM0_IRQHandler [WEAK]
  273. EXPORT PDM_IRQHandler [WEAK]
  274. EXPORT MWU_IRQHandler [WEAK]
  275. EXPORT PWM1_IRQHandler [WEAK]
  276. EXPORT PWM2_IRQHandler [WEAK]
  277. EXPORT SPIM2_SPIS2_SPI2_IRQHandler [WEAK]
  278. EXPORT RTC2_IRQHandler [WEAK]
  279. EXPORT I2S_IRQHandler [WEAK]
  280. EXPORT FPU_IRQHandler [WEAK]
  281. POWER_CLOCK_IRQHandler
  282. RADIO_IRQHandler
  283. UARTE0_UART0_IRQHandler
  284. SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
  285. SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
  286. NFCT_IRQHandler
  287. GPIOTE_IRQHandler
  288. SAADC_IRQHandler
  289. TIMER0_IRQHandler
  290. TIMER1_IRQHandler
  291. TIMER2_IRQHandler
  292. RTC0_IRQHandler
  293. TEMP_IRQHandler
  294. RNG_IRQHandler
  295. ECB_IRQHandler
  296. CCM_AAR_IRQHandler
  297. WDT_IRQHandler
  298. RTC1_IRQHandler
  299. QDEC_IRQHandler
  300. COMP_LPCOMP_IRQHandler
  301. SWI0_EGU0_IRQHandler
  302. SWI1_EGU1_IRQHandler
  303. SWI2_EGU2_IRQHandler
  304. SWI3_EGU3_IRQHandler
  305. SWI4_EGU4_IRQHandler
  306. SWI5_EGU5_IRQHandler
  307. TIMER3_IRQHandler
  308. TIMER4_IRQHandler
  309. PWM0_IRQHandler
  310. PDM_IRQHandler
  311. MWU_IRQHandler
  312. PWM1_IRQHandler
  313. PWM2_IRQHandler
  314. SPIM2_SPIS2_SPI2_IRQHandler
  315. RTC2_IRQHandler
  316. I2S_IRQHandler
  317. FPU_IRQHandler
  318. B .
  319. ENDP
  320. ALIGN
  321. ; User Initial Stack & Heap
  322. IF :DEF:__MICROLIB
  323. EXPORT __initial_sp
  324. EXPORT __heap_base
  325. EXPORT __heap_limit
  326. ELSE
  327. IMPORT __use_two_region_memory
  328. EXPORT __user_initial_stackheap
  329. __user_initial_stackheap PROC
  330. LDR R0, = Heap_Mem
  331. LDR R1, = (Stack_Mem + Stack_Size)
  332. LDR R2, = (Heap_Mem + Heap_Size)
  333. LDR R3, = Stack_Mem
  334. BX LR
  335. ENDP
  336. ALIGN
  337. ENDIF
  338. END