nrf_vmc.h 12 KB

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  1. /**
  2. * Copyright (c) 2018 - 2020, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef NRF_VMC_H__
  41. #define NRF_VMC_H__
  42. #include <nrfx.h>
  43. #ifdef __cplusplus
  44. extern "C" {
  45. #endif
  46. /**
  47. * @defgroup nrf_vmc_hal VMC HAL
  48. * @{
  49. * @ingroup nrf_vmc
  50. * @brief Hardware access layer for managing the Volatile Memory Controller (VMC) peripheral.
  51. */
  52. /** @brief Power configuration bits for each section in particular RAM block. */
  53. typedef enum
  54. {
  55. NRF_VMC_POWER_S0 = VMC_RAM_POWER_S0POWER_Msk, ///< Keep retention on RAM section S0 of the particular RAM block when RAM section is switched off.
  56. NRF_VMC_POWER_S1 = VMC_RAM_POWER_S1POWER_Msk, ///< Keep retention on RAM section S1 of the particular RAM block when RAM section is switched off.
  57. NRF_VMC_POWER_S2 = VMC_RAM_POWER_S2POWER_Msk, ///< Keep retention on RAM section S2 of the particular RAM block when RAM section is switched off.
  58. NRF_VMC_POWER_S3 = VMC_RAM_POWER_S3POWER_Msk, ///< Keep retention on RAM section S3 of the particular RAM block when RAM section is switched off.
  59. } nrf_vmc_power_t;
  60. /** @brief Retention configuration bits for each section in particular RAM block. */
  61. typedef enum
  62. {
  63. NRF_VMC_RETENTION_S0 = VMC_RAM_POWER_S0RETENTION_Msk, ///< Keep RAM section S0 of the particular RAM block on or off in System ON mode.
  64. NRF_VMC_RETENTION_S1 = VMC_RAM_POWER_S1RETENTION_Msk, ///< Keep RAM section S1 of the particular RAM block on or off in System ON mode.
  65. NRF_VMC_RETENTION_S2 = VMC_RAM_POWER_S2RETENTION_Msk, ///< Keep RAM section S2 of the particular RAM block on or off in System ON mode.
  66. NRF_VMC_RETENTION_S3 = VMC_RAM_POWER_S3RETENTION_Msk, ///< Keep RAM section S3 of the particular RAM block on or off in System ON mode.
  67. } nrf_vmc_retention_t;
  68. /**
  69. * @brief Function for setting power configuration for the particular RAM block.
  70. *
  71. * @note Overrides current configuration.
  72. *
  73. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  74. * @param[in] ram_block_num RAM block number.
  75. * @param[in] power_mask Bitmask with sections configuration of particular RAM block.
  76. * @ref nrf_vmc_power_t should be use to prepare this bitmask.
  77. * @param[in] retention_mask Bitmask with sections configuration of particular RAM block.
  78. * @ref nrf_vmc_retention_t should be use to prepare this bitmask.
  79. */
  80. __STATIC_INLINE void nrf_vmc_ram_block_config(NRF_VMC_Type * p_reg,
  81. uint8_t ram_block_num,
  82. uint32_t power_mask,
  83. uint32_t retention_mask);
  84. /**
  85. * @brief Function for clearing power configuration for the particular RAM block.
  86. *
  87. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  88. * @param[in] ram_block_num RAM block number.
  89. */
  90. __STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_block_num);
  91. /**
  92. * @brief Function for setting power configuration for the particular RAM block.
  93. *
  94. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  95. * @param[in] ram_block_num RAM block number.
  96. * @param[in] sect_power Paricular section of the RAM block.
  97. */
  98. __STATIC_INLINE void nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg,
  99. uint8_t ram_block_num,
  100. nrf_vmc_power_t sect_power);
  101. /**
  102. * @brief Function for clearing power configuration for the particular RAM block.
  103. *
  104. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  105. * @param[in] ram_block_num RAM block number.
  106. * @param[in] sect_power Paricular section of the RAM block.
  107. */
  108. __STATIC_INLINE void nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg,
  109. uint8_t ram_block_num,
  110. nrf_vmc_power_t sect_power);
  111. /**
  112. * @brief Function for getting power configuration of the particular RAM block.
  113. *
  114. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  115. * @param[in] ram_block_num RAM block number.
  116. *
  117. * @return Bitmask with power configuration of sections of particular RAM block.
  118. */
  119. __STATIC_INLINE uint32_t nrf_vmc_ram_block_power_mask_get(NRF_VMC_Type const * p_reg,
  120. uint8_t ram_block_num);
  121. /**
  122. * @brief Function for setting retention configuration for the particular RAM block.
  123. *
  124. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  125. * @param[in] ram_block_num RAM block number.
  126. * @param[in] sect_retention Paricular section of the RAM block.
  127. */
  128. __STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg,
  129. uint8_t ram_block_num,
  130. nrf_vmc_retention_t sect_retention);
  131. /**
  132. * @brief Function for clearing retention configuration for the particular RAM block.
  133. *
  134. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  135. * @param[in] ram_block_num RAM block number.
  136. * @param[in] sect_retention Paricular section of the RAM block.
  137. */
  138. __STATIC_INLINE void nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_reg,
  139. uint8_t ram_block_num,
  140. nrf_vmc_retention_t sect_retention);
  141. /**
  142. * @brief Function for getting retention configuration of the particular RAM block.
  143. *
  144. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  145. * @param[in] ram_block_num RAM block number.
  146. *
  147. * @return Bitmask with retention configuration of sections of particular RAM block
  148. */
  149. __STATIC_INLINE uint32_t nrf_vmc_ram_block_retention_mask_get(NRF_VMC_Type const * p_reg,
  150. uint8_t ram_block_num);
  151. #ifndef SUPPRESS_INLINE_IMPLEMENTATION
  152. __STATIC_INLINE void nrf_vmc_ram_block_config(NRF_VMC_Type * p_reg,
  153. uint8_t ram_block_num,
  154. uint32_t power_mask,
  155. uint32_t retention_mask)
  156. {
  157. p_reg->RAM[ram_block_num].POWER =
  158. (power_mask & (
  159. VMC_RAM_POWER_S0POWER_Msk |
  160. VMC_RAM_POWER_S1POWER_Msk |
  161. VMC_RAM_POWER_S2POWER_Msk |
  162. VMC_RAM_POWER_S3POWER_Msk)) |
  163. (retention_mask & (
  164. VMC_RAM_POWER_S0RETENTION_Msk |
  165. VMC_RAM_POWER_S1RETENTION_Msk |
  166. VMC_RAM_POWER_S2RETENTION_Msk |
  167. VMC_RAM_POWER_S3RETENTION_Msk));
  168. // Perform dummy read of the POWER register to ensure that configuration of sections was
  169. // written to the VMC peripheral.
  170. volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWER;
  171. (void)dummy;
  172. }
  173. __STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_block_num)
  174. {
  175. p_reg->RAM[ram_block_num].POWER = 0;
  176. }
  177. __STATIC_INLINE void nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg,
  178. uint8_t ram_block_num,
  179. nrf_vmc_power_t sect_power)
  180. {
  181. p_reg->RAM[ram_block_num].POWERSET = (uint32_t)sect_power;
  182. // Perform dummy read of the POWERSET register to ensure that configuration of sections was
  183. // written to the VMC peripheral.
  184. volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWERSET;
  185. (void)dummy;
  186. }
  187. __STATIC_INLINE void nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg,
  188. uint8_t ram_block_num,
  189. nrf_vmc_power_t sect_power)
  190. {
  191. p_reg->RAM[ram_block_num].POWERCLR = (uint32_t)sect_power;
  192. }
  193. __STATIC_INLINE uint32_t nrf_vmc_ram_block_power_mask_get(NRF_VMC_Type const * p_reg,
  194. uint8_t ram_block_num)
  195. {
  196. return p_reg->RAM[ram_block_num].POWER & (
  197. VMC_RAM_POWER_S0POWER_Msk |
  198. VMC_RAM_POWER_S1POWER_Msk |
  199. VMC_RAM_POWER_S2POWER_Msk |
  200. VMC_RAM_POWER_S3POWER_Msk);
  201. }
  202. __STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg,
  203. uint8_t ram_block_num,
  204. nrf_vmc_retention_t sect_retention)
  205. {
  206. p_reg->RAM[ram_block_num].POWERSET = (uint32_t)sect_retention;
  207. // Perform dummy read of the POWERSET register to ensure that configuration of sections was
  208. // written to the VMC peripheral.
  209. volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWERSET;
  210. (void)dummy;
  211. }
  212. __STATIC_INLINE void nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_reg,
  213. uint8_t ram_block_num,
  214. nrf_vmc_retention_t sect_retention)
  215. {
  216. p_reg->RAM[ram_block_num].POWERCLR = (uint32_t)sect_retention;
  217. }
  218. __STATIC_INLINE uint32_t nrf_vmc_ram_block_retention_mask_get(NRF_VMC_Type const * p_reg,
  219. uint8_t ram_block_num)
  220. {
  221. return p_reg->RAM[ram_block_num].POWER & (
  222. VMC_RAM_POWER_S0RETENTION_Msk |
  223. VMC_RAM_POWER_S1RETENTION_Msk |
  224. VMC_RAM_POWER_S2RETENTION_Msk |
  225. VMC_RAM_POWER_S3RETENTION_Msk);
  226. }
  227. #endif // SUPPRESS_INLINE_IMPLEMENTATION
  228. /** @} */
  229. #ifdef __cplusplus
  230. }
  231. #endif
  232. #endif // NRF_VMC_H__