nrf_twi.h 15 KB

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  1. /**
  2. * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef NRF_TWI_H__
  41. #define NRF_TWI_H__
  42. #include <nrfx.h>
  43. #ifdef __cplusplus
  44. extern "C" {
  45. #endif
  46. /**
  47. * @defgroup nrf_twi_hal TWI HAL
  48. * @{
  49. * @ingroup nrf_twi
  50. * @brief Hardware access layer for managing the TWI peripheral.
  51. */
  52. /**
  53. * @brief TWI tasks.
  54. */
  55. typedef enum
  56. {
  57. /*lint -save -e30*/
  58. NRF_TWI_TASK_STARTRX = offsetof(NRF_TWI_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
  59. NRF_TWI_TASK_STARTTX = offsetof(NRF_TWI_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
  60. NRF_TWI_TASK_STOP = offsetof(NRF_TWI_Type, TASKS_STOP), ///< Stop TWI transaction.
  61. NRF_TWI_TASK_SUSPEND = offsetof(NRF_TWI_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
  62. NRF_TWI_TASK_RESUME = offsetof(NRF_TWI_Type, TASKS_RESUME) ///< Resume TWI transaction.
  63. /*lint -restore*/
  64. } nrf_twi_task_t;
  65. /**
  66. * @brief TWI events.
  67. */
  68. typedef enum
  69. {
  70. /*lint -save -e30*/
  71. NRF_TWI_EVENT_STOPPED = offsetof(NRF_TWI_Type, EVENTS_STOPPED), ///< TWI stopped.
  72. NRF_TWI_EVENT_RXDREADY = offsetof(NRF_TWI_Type, EVENTS_RXDREADY), ///< TWI RXD byte received.
  73. NRF_TWI_EVENT_TXDSENT = offsetof(NRF_TWI_Type, EVENTS_TXDSENT), ///< TWI TXD byte sent.
  74. NRF_TWI_EVENT_ERROR = offsetof(NRF_TWI_Type, EVENTS_ERROR), ///< TWI error.
  75. NRF_TWI_EVENT_BB = offsetof(NRF_TWI_Type, EVENTS_BB), ///< TWI byte boundary, generated before each byte that is sent or received.
  76. NRF_TWI_EVENT_SUSPENDED = offsetof(NRF_TWI_Type, EVENTS_SUSPENDED) ///< TWI entered the suspended state.
  77. /*lint -restore*/
  78. } nrf_twi_event_t;
  79. /**
  80. * @brief TWI shortcuts.
  81. */
  82. typedef enum
  83. {
  84. NRF_TWI_SHORT_BB_SUSPEND_MASK = TWI_SHORTS_BB_SUSPEND_Msk, ///< Shortcut between BB event and SUSPEND task.
  85. NRF_TWI_SHORT_BB_STOP_MASK = TWI_SHORTS_BB_STOP_Msk, ///< Shortcut between BB event and STOP task.
  86. NRF_TWI_ALL_SHORTS_MASK = TWI_SHORTS_BB_SUSPEND_Msk |
  87. TWI_SHORTS_BB_STOP_Msk ///< All TWI shortcuts.
  88. } nrf_twi_short_mask_t;
  89. /**
  90. * @brief TWI interrupts.
  91. */
  92. typedef enum
  93. {
  94. NRF_TWI_INT_STOPPED_MASK = TWI_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
  95. NRF_TWI_INT_RXDREADY_MASK = TWI_INTENSET_RXDREADY_Msk, ///< Interrupt on RXDREADY event.
  96. NRF_TWI_INT_TXDSENT_MASK = TWI_INTENSET_TXDSENT_Msk, ///< Interrupt on TXDSENT event.
  97. NRF_TWI_INT_ERROR_MASK = TWI_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
  98. NRF_TWI_INT_BB_MASK = TWI_INTENSET_BB_Msk, ///< Interrupt on BB event.
  99. NRF_TWI_INT_SUSPENDED_MASK = TWI_INTENSET_SUSPENDED_Msk, ///< Interrupt on SUSPENDED event.
  100. NRF_TWI_ALL_INTS_MASK = TWI_INTENSET_STOPPED_Msk |
  101. TWI_INTENSET_RXDREADY_Msk |
  102. TWI_INTENSET_TXDSENT_Msk |
  103. TWI_INTENSET_ERROR_Msk |
  104. TWI_INTENSET_BB_Msk |
  105. TWI_INTENSET_SUSPENDED_Msk ///< All TWI interrupts.
  106. } nrf_twi_int_mask_t;
  107. /**
  108. * @brief TWI error source.
  109. */
  110. typedef enum
  111. {
  112. NRF_TWI_ERROR_ADDRESS_NACK = TWI_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
  113. NRF_TWI_ERROR_DATA_NACK = TWI_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte.
  114. NRF_TWI_ERROR_OVERRUN = TWI_ERRORSRC_OVERRUN_Msk ///< Overrun error.
  115. /**< A new byte was received before the previous byte was read
  116. * from the RXD register (previous data is lost). */
  117. } nrf_twi_error_t;
  118. /**
  119. * @brief TWI master clock frequency.
  120. */
  121. typedef enum
  122. {
  123. NRF_TWI_FREQ_100K = TWI_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
  124. NRF_TWI_FREQ_250K = TWI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps.
  125. NRF_TWI_FREQ_400K = TWI_FREQUENCY_FREQUENCY_K400 ///< 400 kbps.
  126. } nrf_twi_frequency_t;
  127. /**
  128. * @brief Function for activating a specific TWI task.
  129. *
  130. * @param[in] p_reg Pointer to the peripheral registers structure.
  131. * @param[in] task Task to activate.
  132. */
  133. __STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg,
  134. nrf_twi_task_t task);
  135. /**
  136. * @brief Function for getting the address of a specific TWI task register.
  137. *
  138. * @param[in] p_reg Pointer to the peripheral registers structure.
  139. * @param[in] task Requested task.
  140. *
  141. * @return Address of the specified task register.
  142. */
  143. __STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg,
  144. nrf_twi_task_t task);
  145. /**
  146. * @brief Function for clearing a specific TWI event.
  147. *
  148. * @param[in] p_reg Pointer to the peripheral registers structure.
  149. * @param[in] event Event to clear.
  150. */
  151. __STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg,
  152. nrf_twi_event_t event);
  153. /**
  154. * @brief Function for checking the state of a specific event.
  155. *
  156. * @param[in] p_reg Pointer to the peripheral registers structure.
  157. * @param[in] event Event to check.
  158. *
  159. * @retval true If the event is set.
  160. * @retval false If the event is not set.
  161. */
  162. __STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg,
  163. nrf_twi_event_t event);
  164. /**
  165. * @brief Function for getting the address of a specific TWI event register.
  166. *
  167. * @param[in] p_reg Pointer to the peripheral registers structure.
  168. * @param[in] event Requested event.
  169. *
  170. * @return Address of the specified event register.
  171. */
  172. __STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg,
  173. nrf_twi_event_t event);
  174. /**
  175. * @brief Function for enabling specified shortcuts.
  176. *
  177. * @param[in] p_reg Pointer to the peripheral registers structure.
  178. * @param[in] shorts_mask Shortcuts to enable.
  179. */
  180. __STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
  181. uint32_t shorts_mask);
  182. /**
  183. * @brief Function for disabling specified shortcuts.
  184. *
  185. * @param[in] p_reg Pointer to the peripheral registers structure.
  186. * @param[in] shorts_mask Shortcuts to disable.
  187. */
  188. __STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
  189. uint32_t shorts_mask);
  190. /**
  191. * @brief Function for enabling specified interrupts.
  192. *
  193. * @param[in] p_reg Pointer to the peripheral registers structure.
  194. * @param[in] int_mask Interrupts to enable.
  195. */
  196. __STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
  197. uint32_t int_mask);
  198. /**
  199. * @brief Function for disabling specified interrupts.
  200. *
  201. * @param[in] p_reg Pointer to the peripheral registers structure.
  202. * @param[in] int_mask Interrupts to disable.
  203. */
  204. __STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
  205. uint32_t int_mask);
  206. /**
  207. * @brief Function for retrieving the state of a given interrupt.
  208. *
  209. * @param[in] p_reg Pointer to the peripheral registers structure.
  210. * @param[in] int_mask Interrupt to check.
  211. *
  212. * @retval true If the interrupt is enabled.
  213. * @retval false If the interrupt is not enabled.
  214. */
  215. __STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
  216. nrf_twi_int_mask_t int_mask);
  217. /**
  218. * @brief Function for enabling the TWI peripheral.
  219. *
  220. * @param[in] p_reg Pointer to the peripheral registers structure.
  221. */
  222. __STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg);
  223. /**
  224. * @brief Function for disabling the TWI peripheral.
  225. *
  226. * @param[in] p_reg Pointer to the peripheral registers structure.
  227. */
  228. __STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg);
  229. /**
  230. * @brief Function for configuring TWI pins.
  231. *
  232. *
  233. * @param[in] p_reg Pointer to the peripheral registers structure.
  234. * @param[in] scl_pin SCL pin number.
  235. * @param[in] sda_pin SDA pin number.
  236. */
  237. __STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg,
  238. uint32_t scl_pin,
  239. uint32_t sda_pin);
  240. /**
  241. * @brief Function for setting the TWI master clock frequency.
  242. *
  243. * @param[in] p_reg Pointer to the peripheral registers structure.
  244. * @param[in] frequency TWI frequency.
  245. */
  246. __STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg,
  247. nrf_twi_frequency_t frequency);
  248. /**
  249. * @brief Function for checking the TWI error source.
  250. *
  251. * The error flags are cleared after reading.
  252. *
  253. * @param[in] p_reg Pointer to the peripheral registers structure.
  254. *
  255. * @return Mask with error source flags.
  256. */
  257. __STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg);
  258. /**
  259. * @brief Function for setting the address to be used in TWI transfers.
  260. *
  261. * @param[in] p_reg Pointer to the peripheral registers structure.
  262. * @param[in] address Address to be used in transfers.
  263. */
  264. __STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address);
  265. /**
  266. * @brief Function for reading data received by TWI.
  267. *
  268. * @param[in] p_reg Pointer to the peripheral registers structure.
  269. *
  270. * @return Received data.
  271. */
  272. __STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg);
  273. /**
  274. * @brief Function for writing data to be transmitted by TWI.
  275. *
  276. * @param[in] p_reg Pointer to the peripheral registers structure.
  277. * @param[in] data Data to be transmitted.
  278. */
  279. __STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data);
  280. __STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
  281. uint32_t shorts_mask);
  282. #ifndef SUPPRESS_INLINE_IMPLEMENTATION
  283. __STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg,
  284. nrf_twi_task_t task)
  285. {
  286. *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
  287. }
  288. __STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg,
  289. nrf_twi_task_t task)
  290. {
  291. return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task);
  292. }
  293. __STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg,
  294. nrf_twi_event_t event)
  295. {
  296. *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
  297. #if __CORTEX_M == 0x04
  298. volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
  299. (void)dummy;
  300. #endif
  301. }
  302. __STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg,
  303. nrf_twi_event_t event)
  304. {
  305. return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
  306. }
  307. __STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg,
  308. nrf_twi_event_t event)
  309. {
  310. return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
  311. }
  312. __STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
  313. uint32_t shorts_mask)
  314. {
  315. p_reg->SHORTS |= shorts_mask;
  316. }
  317. __STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
  318. uint32_t shorts_mask)
  319. {
  320. p_reg->SHORTS &= ~(shorts_mask);
  321. }
  322. __STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
  323. uint32_t int_mask)
  324. {
  325. p_reg->INTENSET = int_mask;
  326. }
  327. __STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
  328. uint32_t int_mask)
  329. {
  330. p_reg->INTENCLR = int_mask;
  331. }
  332. __STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
  333. nrf_twi_int_mask_t int_mask)
  334. {
  335. return (bool)(p_reg->INTENSET & int_mask);
  336. }
  337. __STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg)
  338. {
  339. p_reg->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos);
  340. }
  341. __STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg)
  342. {
  343. p_reg->ENABLE = (TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos);
  344. }
  345. __STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg,
  346. uint32_t scl_pin,
  347. uint32_t sda_pin)
  348. {
  349. #if defined(TWI_PSEL_SCL_CONNECT_Pos)
  350. p_reg->PSEL.SCL = scl_pin;
  351. #else
  352. p_reg->PSELSCL = scl_pin;
  353. #endif
  354. #if defined(TWI_PSEL_SDA_CONNECT_Pos)
  355. p_reg->PSEL.SDA = sda_pin;
  356. #else
  357. p_reg->PSELSDA = sda_pin;
  358. #endif
  359. }
  360. __STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg,
  361. nrf_twi_frequency_t frequency)
  362. {
  363. p_reg->FREQUENCY = frequency;
  364. }
  365. __STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg)
  366. {
  367. uint32_t error_source = p_reg->ERRORSRC;
  368. // [error flags are cleared by writing '1' on their position]
  369. p_reg->ERRORSRC = error_source;
  370. return error_source;
  371. }
  372. __STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address)
  373. {
  374. p_reg->ADDRESS = address;
  375. }
  376. __STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg)
  377. {
  378. return (uint8_t)p_reg->RXD;
  379. }
  380. __STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data)
  381. {
  382. p_reg->TXD = data;
  383. }
  384. __STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
  385. uint32_t shorts_mask)
  386. {
  387. p_reg->SHORTS = shorts_mask;
  388. }
  389. #endif // SUPPRESS_INLINE_IMPLEMENTATION
  390. /** @} */
  391. #ifdef __cplusplus
  392. }
  393. #endif
  394. #endif // NRF_TWI_H__