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#ifndef _SSI_PAL_BARRIER_H
#define _SSI_PAL_BARRIER_H

/*!
@file
@brief This file contains the definitions and APIs for memory barrier implementation.
       This is a place holder for platform specific memory barrier implementation
       The secure core driver should include a memory barrier before and after the last word of the descriptor
       to allow correct order between the words and different descriptors.
@defgroup ssi_pal_barrier CryptoCell PAL memory Barrier APIs
@{
@ingroup ssi_pal

*/

/*!
 * This MACRO is responsible to put the memory barrier after the write operation.
 *
 * @return None
 */

void SaSi_PalWmb(void);

/*!
 * This MACRO is responsible to put the memory barrier before the read operation.
 *
 * @return None
 */
void SaSi_PalRmb(void);

/**
@}
 */
#endif